57 	cdclk_state->cdclk = 133333;  in fixed_133mhz_get_cdclk()
63 	cdclk_state->cdclk = 200000;  in fixed_200mhz_get_cdclk()
69 	cdclk_state->cdclk = 266667;  in fixed_266mhz_get_cdclk()
75 	cdclk_state->cdclk = 333333;  in fixed_333mhz_get_cdclk()
81 	cdclk_state->cdclk = 400000;  in fixed_400mhz_get_cdclk()
87 	cdclk_state->cdclk = 450000;  in fixed_450mhz_get_cdclk()
102 		cdclk_state->cdclk = 133333;  in i85x_get_cdclk()
116 		cdclk_state->cdclk = 200000;  in i85x_get_cdclk()
119 		cdclk_state->cdclk = 250000;  in i85x_get_cdclk()
122 		cdclk_state->cdclk = 133333;  in i85x_get_cdclk()
127 		cdclk_state->cdclk = 266667;  in i85x_get_cdclk()
141 		cdclk_state->cdclk = 133333;  in i915gm_get_cdclk()
147 		cdclk_state->cdclk = 333333;  in i915gm_get_cdclk()
151 		cdclk_state->cdclk = 190000;  in i915gm_get_cdclk()
165 		cdclk_state->cdclk = 133333;  in i945gm_get_cdclk()
171 		cdclk_state->cdclk = 320000;  in i945gm_get_cdclk()
175 		cdclk_state->cdclk = 200000;  in i945gm_get_cdclk()
286 	cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco,  in g33_get_cdclk()
293 	cdclk_state->cdclk = 190476;  in g33_get_cdclk()
306 		cdclk_state->cdclk = 266667;  in pnv_get_cdclk()
309 		cdclk_state->cdclk = 333333;  in pnv_get_cdclk()
312 		cdclk_state->cdclk = 444444;  in pnv_get_cdclk()
315 		cdclk_state->cdclk = 200000;  in pnv_get_cdclk()
321 		cdclk_state->cdclk = 133333;  in pnv_get_cdclk()
324 		cdclk_state->cdclk = 166667;  in pnv_get_cdclk()
363 	cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco,  in i965gm_get_cdclk()
370 	cdclk_state->cdclk = 200000;  in i965gm_get_cdclk()
390 		cdclk_state->cdclk = cdclk_sel ? 333333 : 222222;  in gm45_get_cdclk()
393 		cdclk_state->cdclk = cdclk_sel ? 320000 : 228571;  in gm45_get_cdclk()
398 		cdclk_state->cdclk = 222222;  in gm45_get_cdclk()
410 		cdclk_state->cdclk = 800000;  in hsw_get_cdclk()
412 		cdclk_state->cdclk = 450000;  in hsw_get_cdclk()
414 		cdclk_state->cdclk = 450000;  in hsw_get_cdclk()
416 		cdclk_state->cdclk = 337500;  in hsw_get_cdclk()
418 		cdclk_state->cdclk = 540000;  in hsw_get_cdclk()
441 static u8 vlv_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk)  in vlv_calc_voltage_level()  argument
444 		if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */  in vlv_calc_voltage_level()
446 		else if (cdclk >= 266667)  in vlv_calc_voltage_level()
456 		return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;  in vlv_calc_voltage_level()
466 	cdclk_state->cdclk = vlv_get_cck_clock(dev_priv, "cdclk",  in vlv_get_cdclk()
491 	if (dev_priv->cdclk.hw.cdclk >= dev_priv->czclk_freq) {  in vlv_program_pfi_credits()
521 	int cdclk = cdclk_state->cdclk;  in vlv_set_cdclk()  local
524 	switch (cdclk) {  in vlv_set_cdclk()
532 		MISSING_CASE(cdclk);  in vlv_set_cdclk()
558 	if (cdclk == 400000) {  in vlv_set_cdclk()
562 					    cdclk) - 1;  in vlv_set_cdclk()
584 	if (cdclk == 400000)  in vlv_set_cdclk()
602 	int cdclk = cdclk_state->cdclk;  in chv_set_cdclk()  local
605 	switch (cdclk) {  in chv_set_cdclk()
612 		MISSING_CASE(cdclk);  in chv_set_cdclk()
655 static u8 bdw_calc_voltage_level(int cdclk)  in bdw_calc_voltage_level()  argument
657 	switch (cdclk) {  in bdw_calc_voltage_level()
677 		cdclk_state->cdclk = 800000;  in bdw_get_cdclk()
679 		cdclk_state->cdclk = 450000;  in bdw_get_cdclk()
681 		cdclk_state->cdclk = 450000;  in bdw_get_cdclk()
683 		cdclk_state->cdclk = 540000;  in bdw_get_cdclk()
685 		cdclk_state->cdclk = 337500;  in bdw_get_cdclk()
687 		cdclk_state->cdclk = 675000;  in bdw_get_cdclk()
694 		bdw_calc_voltage_level(cdclk_state->cdclk);  in bdw_get_cdclk()
700 	int cdclk = cdclk_state->cdclk;  in bdw_set_cdclk()  local
736 	switch (cdclk) {  in bdw_set_cdclk()
738 		MISSING_CASE(cdclk);  in bdw_set_cdclk()
769 	I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1);  in bdw_set_cdclk()
797 static u8 skl_calc_voltage_level(int cdclk)  in skl_calc_voltage_level()  argument
799 	switch (cdclk) {  in skl_calc_voltage_level()
862 	cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref;  in skl_get_cdclk()
872 			cdclk_state->cdclk = 432000;  in skl_get_cdclk()
875 			cdclk_state->cdclk = 308571;  in skl_get_cdclk()
878 			cdclk_state->cdclk = 540000;  in skl_get_cdclk()
881 			cdclk_state->cdclk = 617143;  in skl_get_cdclk()
890 			cdclk_state->cdclk = 450000;  in skl_get_cdclk()
893 			cdclk_state->cdclk = 337500;  in skl_get_cdclk()
896 			cdclk_state->cdclk = 540000;  in skl_get_cdclk()
899 			cdclk_state->cdclk = 675000;  in skl_get_cdclk()
913 		skl_calc_voltage_level(cdclk_state->cdclk);  in skl_get_cdclk()
917 static int skl_cdclk_decimal(int cdclk)  in skl_cdclk_decimal()  argument
919 	return DIV_ROUND_CLOSEST(cdclk - 1000, 500);  in skl_cdclk_decimal()
970 	dev_priv->cdclk.hw.vco = vco;  in skl_dpll0_enable()
984 	dev_priv->cdclk.hw.vco = 0;  in skl_dpll0_disable()
990 	int cdclk = cdclk_state->cdclk;  in skl_set_cdclk()  local
1018 	switch (cdclk) {  in skl_set_cdclk()
1020 		WARN_ON(cdclk != dev_priv->cdclk.hw.bypass);  in skl_set_cdclk()
1040 	if (dev_priv->cdclk.hw.vco != 0 &&  in skl_set_cdclk()
1041 	    dev_priv->cdclk.hw.vco != vco)  in skl_set_cdclk()
1046 	if (dev_priv->cdclk.hw.vco != vco) {  in skl_set_cdclk()
1049 		cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk);  in skl_set_cdclk()
1058 	if (dev_priv->cdclk.hw.vco != vco)  in skl_set_cdclk()
1065 	cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk);  in skl_set_cdclk()
1095 	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");  in skl_sanitize_cdclk()
1098 	if (dev_priv->cdclk.hw.vco == 0 ||  in skl_sanitize_cdclk()
1099 	    dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass)  in skl_sanitize_cdclk()
1110 		skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk);  in skl_sanitize_cdclk()
1119 	dev_priv->cdclk.hw.cdclk = 0;  in skl_sanitize_cdclk()
1121 	dev_priv->cdclk.hw.vco = -1;  in skl_sanitize_cdclk()
1139 	if (dev_priv->cdclk.hw.cdclk != 0 &&  in skl_init_cdclk()
1140 	    dev_priv->cdclk.hw.vco != 0) {  in skl_init_cdclk()
1147 						    dev_priv->cdclk.hw.vco);  in skl_init_cdclk()
1151 	cdclk_state = dev_priv->cdclk.hw;  in skl_init_cdclk()
1156 	cdclk_state.cdclk = skl_calc_cdclk(0, cdclk_state.vco);  in skl_init_cdclk()
1157 	cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk);  in skl_init_cdclk()
1171 	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;  in skl_uninit_cdclk()
1173 	cdclk_state.cdclk = cdclk_state.bypass;  in skl_uninit_cdclk()
1175 	cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk);  in skl_uninit_cdclk()
1204 static u8 bxt_calc_voltage_level(int cdclk)  in bxt_calc_voltage_level()  argument
1206 	return DIV_ROUND_UP(cdclk, 25000);  in bxt_calc_voltage_level()
1209 static int bxt_de_pll_vco(struct drm_i915_private *dev_priv, int cdclk)  in bxt_de_pll_vco()  argument
1213 	if (cdclk == dev_priv->cdclk.hw.bypass)  in bxt_de_pll_vco()
1216 	switch (cdclk) {  in bxt_de_pll_vco()
1218 		MISSING_CASE(cdclk);  in bxt_de_pll_vco()
1231 	return dev_priv->cdclk.hw.ref * ratio;  in bxt_de_pll_vco()
1234 static int glk_de_pll_vco(struct drm_i915_private *dev_priv, int cdclk)  in glk_de_pll_vco()  argument
1238 	if (cdclk == dev_priv->cdclk.hw.bypass)  in glk_de_pll_vco()
1241 	switch (cdclk) {  in glk_de_pll_vco()
1243 		MISSING_CASE(cdclk);  in glk_de_pll_vco()
1252 	return dev_priv->cdclk.hw.ref * ratio;  in glk_de_pll_vco()
1282 	cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref;  in bxt_get_cdclk()
1308 	cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div);  in bxt_get_cdclk()
1316 		bxt_calc_voltage_level(cdclk_state->cdclk);  in bxt_get_cdclk()
1329 	dev_priv->cdclk.hw.vco = 0;  in bxt_de_pll_disable()
1334 	int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref);  in bxt_de_pll_enable()
1352 	dev_priv->cdclk.hw.vco = vco;  in bxt_de_pll_enable()
1358 	int cdclk = cdclk_state->cdclk;  in bxt_set_cdclk()  local
1364 	switch (DIV_ROUND_CLOSEST(vco, cdclk)) {  in bxt_set_cdclk()
1366 		WARN_ON(cdclk != dev_priv->cdclk.hw.bypass);  in bxt_set_cdclk()
1397 			  ret, cdclk);  in bxt_set_cdclk()
1401 	if (dev_priv->cdclk.hw.vco != 0 &&  in bxt_set_cdclk()
1402 	    dev_priv->cdclk.hw.vco != vco)  in bxt_set_cdclk()
1405 	if (dev_priv->cdclk.hw.vco != vco)  in bxt_set_cdclk()
1408 	val = divider | skl_cdclk_decimal(cdclk);  in bxt_set_cdclk()
1418 	if (cdclk >= 500000)  in bxt_set_cdclk()
1436 			  ret, cdclk);  in bxt_set_cdclk()
1448 	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");  in bxt_sanitize_cdclk()
1450 	if (dev_priv->cdclk.hw.vco == 0 ||  in bxt_sanitize_cdclk()
1451 	    dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass)  in bxt_sanitize_cdclk()
1469 		skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk);  in bxt_sanitize_cdclk()
1474 	if (dev_priv->cdclk.hw.cdclk >= 500000)  in bxt_sanitize_cdclk()
1485 	dev_priv->cdclk.hw.cdclk = 0;  in bxt_sanitize_cdclk()
1488 	dev_priv->cdclk.hw.vco = -1;  in bxt_sanitize_cdclk()
1506 	if (dev_priv->cdclk.hw.cdclk != 0 &&  in bxt_init_cdclk()
1507 	    dev_priv->cdclk.hw.vco != 0)  in bxt_init_cdclk()
1510 	cdclk_state = dev_priv->cdclk.hw;  in bxt_init_cdclk()
1518 		cdclk_state.cdclk = glk_calc_cdclk(0);  in bxt_init_cdclk()
1519 		cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);  in bxt_init_cdclk()
1521 		cdclk_state.cdclk = bxt_calc_cdclk(0);  in bxt_init_cdclk()
1522 		cdclk_state.vco = bxt_de_pll_vco(dev_priv, cdclk_state.cdclk);  in bxt_init_cdclk()
1524 	cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);  in bxt_init_cdclk()
1538 	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;  in bxt_uninit_cdclk()
1540 	cdclk_state.cdclk = cdclk_state.bypass;  in bxt_uninit_cdclk()
1542 	cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk);  in bxt_uninit_cdclk()
1557 static u8 cnl_calc_voltage_level(int cdclk)  in cnl_calc_voltage_level()  argument
1559 	switch (cdclk) {  in cnl_calc_voltage_level()
1600 	cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref;  in cnl_get_cdclk()
1619 	cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div);  in cnl_get_cdclk()
1627 		cnl_calc_voltage_level(cdclk_state->cdclk);  in cnl_get_cdclk()
1642 	dev_priv->cdclk.hw.vco = 0;  in cnl_cdclk_pll_disable()
1647 	int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref);  in cnl_cdclk_pll_enable()
1660 	dev_priv->cdclk.hw.vco = vco;  in cnl_cdclk_pll_enable()
1666 	int cdclk = cdclk_state->cdclk;  in cnl_set_cdclk()  local
1684 	switch (DIV_ROUND_CLOSEST(vco, cdclk)) {  in cnl_set_cdclk()
1686 		WARN_ON(cdclk != dev_priv->cdclk.hw.bypass);  in cnl_set_cdclk()
1697 	if (dev_priv->cdclk.hw.vco != 0 &&  in cnl_set_cdclk()
1698 	    dev_priv->cdclk.hw.vco != vco)  in cnl_set_cdclk()
1701 	if (dev_priv->cdclk.hw.vco != vco)  in cnl_set_cdclk()
1704 	val = divider | skl_cdclk_decimal(cdclk);  in cnl_set_cdclk()
1724 	dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level;  in cnl_set_cdclk()
1727 static int cnl_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)  in cnl_cdclk_pll_vco()  argument
1731 	if (cdclk == dev_priv->cdclk.hw.bypass)  in cnl_cdclk_pll_vco()
1734 	switch (cdclk) {  in cnl_cdclk_pll_vco()
1736 		MISSING_CASE(cdclk);  in cnl_cdclk_pll_vco()
1740 		ratio = dev_priv->cdclk.hw.ref == 19200 ? 35 : 28;  in cnl_cdclk_pll_vco()
1743 		ratio = dev_priv->cdclk.hw.ref == 19200 ? 55 : 44;  in cnl_cdclk_pll_vco()
1747 	return dev_priv->cdclk.hw.ref * ratio;  in cnl_cdclk_pll_vco()
1755 	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");  in cnl_sanitize_cdclk()
1757 	if (dev_priv->cdclk.hw.vco == 0 ||  in cnl_sanitize_cdclk()
1758 	    dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass)  in cnl_sanitize_cdclk()
1776 		   skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk);  in cnl_sanitize_cdclk()
1786 	dev_priv->cdclk.hw.cdclk = 0;  in cnl_sanitize_cdclk()
1789 	dev_priv->cdclk.hw.vco = -1;  in cnl_sanitize_cdclk()
1819 static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)  in icl_calc_cdclk_pll_vco()  argument
1823 	if (cdclk == dev_priv->cdclk.hw.bypass)  in icl_calc_cdclk_pll_vco()
1826 	switch (cdclk) {  in icl_calc_cdclk_pll_vco()
1828 		MISSING_CASE(cdclk);  in icl_calc_cdclk_pll_vco()
1833 		WARN_ON(dev_priv->cdclk.hw.ref != 19200 &&  in icl_calc_cdclk_pll_vco()
1834 			dev_priv->cdclk.hw.ref != 38400);  in icl_calc_cdclk_pll_vco()
1839 		WARN_ON(dev_priv->cdclk.hw.ref != 24000);  in icl_calc_cdclk_pll_vco()
1842 	ratio = cdclk / (dev_priv->cdclk.hw.ref / 2);  in icl_calc_cdclk_pll_vco()
1844 	return dev_priv->cdclk.hw.ref * ratio;  in icl_calc_cdclk_pll_vco()
1850 	unsigned int cdclk = cdclk_state->cdclk;  in icl_set_cdclk()  local
1866 	if (dev_priv->cdclk.hw.vco != 0 &&  in icl_set_cdclk()
1867 	    dev_priv->cdclk.hw.vco != vco)  in icl_set_cdclk()
1870 	if (dev_priv->cdclk.hw.vco != vco)  in icl_set_cdclk()
1874 			      skl_cdclk_decimal(cdclk));  in icl_set_cdclk()
1887 	dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level;  in icl_set_cdclk()
1890 static u8 icl_calc_voltage_level(int cdclk)  in icl_calc_voltage_level()  argument
1892 	switch (cdclk) {  in icl_calc_voltage_level()
1901 		MISSING_CASE(cdclk);  in icl_calc_voltage_level()
1940 		cdclk_state->cdclk = cdclk_state->bypass;  in icl_get_cdclk()
1949 	cdclk_state->cdclk = cdclk_state->vco / 2;  in icl_get_cdclk()
1957 		icl_calc_voltage_level(cdclk_state->cdclk);  in icl_get_cdclk()
1976 	intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");  in icl_init_cdclk()
1979 	if (dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass)  in icl_init_cdclk()
1988 	    skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk))  in icl_init_cdclk()
1996 	sanitized_state.ref = dev_priv->cdclk.hw.ref;  in icl_init_cdclk()
1997 	sanitized_state.cdclk = icl_calc_cdclk(0, sanitized_state.ref);  in icl_init_cdclk()
1999 						     sanitized_state.cdclk);  in icl_init_cdclk()
2001 				icl_calc_voltage_level(sanitized_state.cdclk);  in icl_init_cdclk()
2015 	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;  in icl_uninit_cdclk()
2017 	cdclk_state.cdclk = cdclk_state.bypass;  in icl_uninit_cdclk()
2019 	cdclk_state.voltage_level = icl_calc_voltage_level(cdclk_state.cdclk);  in icl_uninit_cdclk()
2039 	if (dev_priv->cdclk.hw.cdclk != 0 &&  in cnl_init_cdclk()
2040 	    dev_priv->cdclk.hw.vco != 0)  in cnl_init_cdclk()
2043 	cdclk_state = dev_priv->cdclk.hw;  in cnl_init_cdclk()
2045 	cdclk_state.cdclk = cnl_calc_cdclk(0);  in cnl_init_cdclk()
2046 	cdclk_state.vco = cnl_cdclk_pll_vco(dev_priv, cdclk_state.cdclk);  in cnl_init_cdclk()
2047 	cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk);  in cnl_init_cdclk()
2061 	struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;  in cnl_uninit_cdclk()
2063 	cdclk_state.cdclk = cdclk_state.bypass;  in cnl_uninit_cdclk()
2065 	cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk);  in cnl_uninit_cdclk()
2081 	return a->cdclk != b->cdclk ||  in intel_cdclk_needs_modeset()
2105 			 context, cdclk_state->cdclk, cdclk_state->vco,  in intel_dump_cdclk_state()
2121 	if (!intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_state))  in intel_set_cdclk()
2131 	if (WARN(intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_state),  in intel_set_cdclk()
2133 		intel_dump_cdclk_state(&dev_priv->cdclk.hw, "[hw state]");  in intel_set_cdclk()
2296 	int min_cdclk, cdclk;  in vlv_modeset_calc_cdclk()  local
2302 	cdclk = vlv_calc_cdclk(dev_priv, min_cdclk);  in vlv_modeset_calc_cdclk()
2304 	intel_state->cdclk.logical.cdclk = cdclk;  in vlv_modeset_calc_cdclk()
2305 	intel_state->cdclk.logical.voltage_level =  in vlv_modeset_calc_cdclk()
2306 		vlv_calc_voltage_level(dev_priv, cdclk);  in vlv_modeset_calc_cdclk()
2309 		cdclk = vlv_calc_cdclk(dev_priv, 0);  in vlv_modeset_calc_cdclk()
2311 		intel_state->cdclk.actual.cdclk = cdclk;  in vlv_modeset_calc_cdclk()
2312 		intel_state->cdclk.actual.voltage_level =  in vlv_modeset_calc_cdclk()
2313 			vlv_calc_voltage_level(dev_priv, cdclk);  in vlv_modeset_calc_cdclk()
2315 		intel_state->cdclk.actual =  in vlv_modeset_calc_cdclk()
2316 			intel_state->cdclk.logical;  in vlv_modeset_calc_cdclk()
2325 	int min_cdclk, cdclk;  in bdw_modeset_calc_cdclk()  local
2335 	cdclk = bdw_calc_cdclk(min_cdclk);  in bdw_modeset_calc_cdclk()
2337 	intel_state->cdclk.logical.cdclk = cdclk;  in bdw_modeset_calc_cdclk()
2338 	intel_state->cdclk.logical.voltage_level =  in bdw_modeset_calc_cdclk()
2339 		bdw_calc_voltage_level(cdclk);  in bdw_modeset_calc_cdclk()
2342 		cdclk = bdw_calc_cdclk(0);  in bdw_modeset_calc_cdclk()
2344 		intel_state->cdclk.actual.cdclk = cdclk;  in bdw_modeset_calc_cdclk()
2345 		intel_state->cdclk.actual.voltage_level =  in bdw_modeset_calc_cdclk()
2346 			bdw_calc_voltage_level(cdclk);  in bdw_modeset_calc_cdclk()
2348 		intel_state->cdclk.actual =  in bdw_modeset_calc_cdclk()
2349 			intel_state->cdclk.logical;  in bdw_modeset_calc_cdclk()
2362 	vco = intel_state->cdclk.logical.vco;  in skl_dpll0_vco()
2394 	int min_cdclk, cdclk, vco;  in skl_modeset_calc_cdclk()  local
2406 	cdclk = skl_calc_cdclk(min_cdclk, vco);  in skl_modeset_calc_cdclk()
2408 	intel_state->cdclk.logical.vco = vco;  in skl_modeset_calc_cdclk()
2409 	intel_state->cdclk.logical.cdclk = cdclk;  in skl_modeset_calc_cdclk()
2410 	intel_state->cdclk.logical.voltage_level =  in skl_modeset_calc_cdclk()
2411 		skl_calc_voltage_level(cdclk);  in skl_modeset_calc_cdclk()
2414 		cdclk = skl_calc_cdclk(0, vco);  in skl_modeset_calc_cdclk()
2416 		intel_state->cdclk.actual.vco = vco;  in skl_modeset_calc_cdclk()
2417 		intel_state->cdclk.actual.cdclk = cdclk;  in skl_modeset_calc_cdclk()
2418 		intel_state->cdclk.actual.voltage_level =  in skl_modeset_calc_cdclk()
2419 			skl_calc_voltage_level(cdclk);  in skl_modeset_calc_cdclk()
2421 		intel_state->cdclk.actual =  in skl_modeset_calc_cdclk()
2422 			intel_state->cdclk.logical;  in skl_modeset_calc_cdclk()
2432 	int min_cdclk, cdclk, vco;  in bxt_modeset_calc_cdclk()  local
2439 		cdclk = glk_calc_cdclk(min_cdclk);  in bxt_modeset_calc_cdclk()
2440 		vco = glk_de_pll_vco(dev_priv, cdclk);  in bxt_modeset_calc_cdclk()
2442 		cdclk = bxt_calc_cdclk(min_cdclk);  in bxt_modeset_calc_cdclk()
2443 		vco = bxt_de_pll_vco(dev_priv, cdclk);  in bxt_modeset_calc_cdclk()
2446 	intel_state->cdclk.logical.vco = vco;  in bxt_modeset_calc_cdclk()
2447 	intel_state->cdclk.logical.cdclk = cdclk;  in bxt_modeset_calc_cdclk()
2448 	intel_state->cdclk.logical.voltage_level =  in bxt_modeset_calc_cdclk()
2449 		bxt_calc_voltage_level(cdclk);  in bxt_modeset_calc_cdclk()
2453 			cdclk = glk_calc_cdclk(0);  in bxt_modeset_calc_cdclk()
2454 			vco = glk_de_pll_vco(dev_priv, cdclk);  in bxt_modeset_calc_cdclk()
2456 			cdclk = bxt_calc_cdclk(0);  in bxt_modeset_calc_cdclk()
2457 			vco = bxt_de_pll_vco(dev_priv, cdclk);  in bxt_modeset_calc_cdclk()
2460 		intel_state->cdclk.actual.vco = vco;  in bxt_modeset_calc_cdclk()
2461 		intel_state->cdclk.actual.cdclk = cdclk;  in bxt_modeset_calc_cdclk()
2462 		intel_state->cdclk.actual.voltage_level =  in bxt_modeset_calc_cdclk()
2463 			bxt_calc_voltage_level(cdclk);  in bxt_modeset_calc_cdclk()
2465 		intel_state->cdclk.actual =  in bxt_modeset_calc_cdclk()
2466 			intel_state->cdclk.logical;  in bxt_modeset_calc_cdclk()
2476 	int min_cdclk, cdclk, vco;  in cnl_modeset_calc_cdclk()  local
2482 	cdclk = cnl_calc_cdclk(min_cdclk);  in cnl_modeset_calc_cdclk()
2483 	vco = cnl_cdclk_pll_vco(dev_priv, cdclk);  in cnl_modeset_calc_cdclk()
2485 	intel_state->cdclk.logical.vco = vco;  in cnl_modeset_calc_cdclk()
2486 	intel_state->cdclk.logical.cdclk = cdclk;  in cnl_modeset_calc_cdclk()
2487 	intel_state->cdclk.logical.voltage_level =  in cnl_modeset_calc_cdclk()
2488 		max(cnl_calc_voltage_level(cdclk),  in cnl_modeset_calc_cdclk()
2492 		cdclk = cnl_calc_cdclk(0);  in cnl_modeset_calc_cdclk()
2493 		vco = cnl_cdclk_pll_vco(dev_priv, cdclk);  in cnl_modeset_calc_cdclk()
2495 		intel_state->cdclk.actual.vco = vco;  in cnl_modeset_calc_cdclk()
2496 		intel_state->cdclk.actual.cdclk = cdclk;  in cnl_modeset_calc_cdclk()
2497 		intel_state->cdclk.actual.voltage_level =  in cnl_modeset_calc_cdclk()
2498 			cnl_calc_voltage_level(cdclk);  in cnl_modeset_calc_cdclk()
2500 		intel_state->cdclk.actual =  in cnl_modeset_calc_cdclk()
2501 			intel_state->cdclk.logical;  in cnl_modeset_calc_cdclk()
2511 	unsigned int ref = intel_state->cdclk.logical.ref;  in icl_modeset_calc_cdclk()
2512 	int min_cdclk, cdclk, vco;  in icl_modeset_calc_cdclk()  local
2518 	cdclk = icl_calc_cdclk(min_cdclk, ref);  in icl_modeset_calc_cdclk()
2519 	vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk);  in icl_modeset_calc_cdclk()
2521 	intel_state->cdclk.logical.vco = vco;  in icl_modeset_calc_cdclk()
2522 	intel_state->cdclk.logical.cdclk = cdclk;  in icl_modeset_calc_cdclk()
2523 	intel_state->cdclk.logical.voltage_level =  in icl_modeset_calc_cdclk()
2524 		max(icl_calc_voltage_level(cdclk),  in icl_modeset_calc_cdclk()
2528 		cdclk = icl_calc_cdclk(0, ref);  in icl_modeset_calc_cdclk()
2529 		vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk);  in icl_modeset_calc_cdclk()
2531 		intel_state->cdclk.actual.vco = vco;  in icl_modeset_calc_cdclk()
2532 		intel_state->cdclk.actual.cdclk = cdclk;  in icl_modeset_calc_cdclk()
2533 		intel_state->cdclk.actual.voltage_level =  in icl_modeset_calc_cdclk()
2534 			icl_calc_voltage_level(cdclk);  in icl_modeset_calc_cdclk()
2536 		intel_state->cdclk.actual = intel_state->cdclk.logical;  in icl_modeset_calc_cdclk()
2576 		if (dev_priv->cdclk.hw.ref == 24000)  in intel_update_max_cdclk()
2629 		dev_priv->max_cdclk_freq = dev_priv->cdclk.hw.cdclk;  in intel_update_max_cdclk()
2649 	dev_priv->display.get_cdclk(dev_priv, &dev_priv->cdclk.hw);  in intel_update_cdclk()
2659 			   DIV_ROUND_UP(dev_priv->cdclk.hw.cdclk, 1000));  in intel_update_cdclk()