204 parse_lfp_panel_data(struct drm_i915_private *dev_priv,  in parse_lfp_panel_data()  argument
221 	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;  in parse_lfp_panel_data()
223 	ret = intel_opregion_get_panel_type(dev_priv);  in parse_lfp_panel_data()
238 	dev_priv->vbt.panel_type = panel_type;  in parse_lfp_panel_data()
249 		dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;  in parse_lfp_panel_data()
253 		dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;  in parse_lfp_panel_data()
257 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;  in parse_lfp_panel_data()
280 	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;  in parse_lfp_panel_data()
292 			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;  in parse_lfp_panel_data()
294 				      dev_priv->vbt.bios_lvds_val);  in parse_lfp_panel_data()
300 parse_lfp_backlight(struct drm_i915_private *dev_priv,  in parse_lfp_backlight()  argument
305 	int panel_type = dev_priv->vbt.panel_type;  in parse_lfp_backlight()
319 	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;  in parse_lfp_backlight()
320 	if (!dev_priv->vbt.backlight.present) {  in parse_lfp_backlight()
326 	dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;  in parse_lfp_backlight()
332 		dev_priv->vbt.backlight.type = method->type;  in parse_lfp_backlight()
333 		dev_priv->vbt.backlight.controller = method->controller;  in parse_lfp_backlight()
336 	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;  in parse_lfp_backlight()
337 	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;  in parse_lfp_backlight()
338 	dev_priv->vbt.backlight.min_brightness = entry->min_brightness;  in parse_lfp_backlight()
341 		      dev_priv->vbt.backlight.pwm_freq_hz,  in parse_lfp_backlight()
342 		      dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",  in parse_lfp_backlight()
343 		      dev_priv->vbt.backlight.min_brightness,  in parse_lfp_backlight()
345 		      dev_priv->vbt.backlight.controller);  in parse_lfp_backlight()
350 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,  in parse_sdvo_panel_data()  argument
383 	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;  in parse_sdvo_panel_data()
389 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,  in intel_bios_ssc_frequency()  argument
392 	switch (INTEL_GEN(dev_priv)) {  in intel_bios_ssc_frequency()
404 parse_general_features(struct drm_i915_private *dev_priv,  in parse_general_features()  argument
413 	dev_priv->vbt.int_tv_support = general->int_tv_support;  in parse_general_features()
416 	    (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))  in parse_general_features()
417 		dev_priv->vbt.int_crt_support = general->int_crt_support;  in parse_general_features()
418 	dev_priv->vbt.lvds_use_ssc = general->enable_ssc;  in parse_general_features()
419 	dev_priv->vbt.lvds_ssc_freq =  in parse_general_features()
420 		intel_bios_ssc_frequency(dev_priv, general->ssc_freq);  in parse_general_features()
421 	dev_priv->vbt.display_clock_mode = general->display_clock_mode;  in parse_general_features()
422 	dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;  in parse_general_features()
424 		      dev_priv->vbt.int_tv_support,  in parse_general_features()
425 		      dev_priv->vbt.int_crt_support,  in parse_general_features()
426 		      dev_priv->vbt.lvds_use_ssc,  in parse_general_features()
427 		      dev_priv->vbt.lvds_ssc_freq,  in parse_general_features()
428 		      dev_priv->vbt.display_clock_mode,  in parse_general_features()
429 		      dev_priv->vbt.fdi_rx_polarity_inverted);  in parse_general_features()
439 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)  in parse_sdvo_device_mapping()  argument
449 	if (!IS_GEN(dev_priv, 3, 7)) {  in parse_sdvo_device_mapping()
454 	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {  in parse_sdvo_device_mapping()
455 		child = dev_priv->vbt.child_dev + i;  in parse_sdvo_device_mapping()
476 		mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];  in parse_sdvo_device_mapping()
510 parse_driver_features(struct drm_i915_private *dev_priv,  in parse_driver_features()  argument
519 	if (INTEL_GEN(dev_priv) >= 5) {  in parse_driver_features()
526 			dev_priv->vbt.int_lvds_support = 0;  in parse_driver_features()
542 			dev_priv->vbt.int_lvds_support = 0;  in parse_driver_features()
553 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;  in parse_driver_features()
554 	dev_priv->vbt.psr.enable = driver->psr_enabled;  in parse_driver_features()
558 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)  in parse_edp()  argument
563 	int panel_type = dev_priv->vbt.panel_type;  in parse_edp()
571 		dev_priv->vbt.edp.bpp = 18;  in parse_edp()
574 		dev_priv->vbt.edp.bpp = 24;  in parse_edp()
577 		dev_priv->vbt.edp.bpp = 30;  in parse_edp()
585 	dev_priv->vbt.edp.pps = *edp_pps;  in parse_edp()
589 		dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;  in parse_edp()
592 		dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;  in parse_edp()
602 		dev_priv->vbt.edp.lanes = 1;  in parse_edp()
605 		dev_priv->vbt.edp.lanes = 2;  in parse_edp()
608 		dev_priv->vbt.edp.lanes = 4;  in parse_edp()
618 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;  in parse_edp()
621 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;  in parse_edp()
624 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;  in parse_edp()
627 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;  in parse_edp()
637 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;  in parse_edp()
640 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;  in parse_edp()
643 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;  in parse_edp()
646 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;  in parse_edp()
659 			dev_priv->vbt.edp.low_vswing =  in parse_edp()
663 			dev_priv->vbt.edp.low_vswing = vswing == 0;  in parse_edp()
669 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)  in parse_psr()  argument
673 	int panel_type = dev_priv->vbt.panel_type;  in parse_psr()
683 	dev_priv->vbt.psr.full_link = psr_table->full_link;  in parse_psr()
684 	dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;  in parse_psr()
687 	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :  in parse_psr()
692 		dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;  in parse_psr()
695 		dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;  in parse_psr()
698 		dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;  in parse_psr()
701 		dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;  in parse_psr()
714 	    (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||  in parse_psr()
715 	     INTEL_GEN(dev_priv) >= 10)) {  in parse_psr()
718 			dev_priv->vbt.psr.tp1_wakeup_time_us = 500;  in parse_psr()
721 			dev_priv->vbt.psr.tp1_wakeup_time_us = 100;  in parse_psr()
724 			dev_priv->vbt.psr.tp1_wakeup_time_us = 0;  in parse_psr()
731 			dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;  in parse_psr()
737 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;  in parse_psr()
740 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;  in parse_psr()
743 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;  in parse_psr()
750 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;  in parse_psr()
754 		dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;  in parse_psr()
755 		dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;  in parse_psr()
759 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,  in parse_dsi_backlight_ports()  argument
762 	if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {  in parse_dsi_backlight_ports()
763 		dev_priv->vbt.dsi.bl_ports = BIT(port);  in parse_dsi_backlight_ports()
764 		if (dev_priv->vbt.dsi.config->cabc_supported)  in parse_dsi_backlight_ports()
765 			dev_priv->vbt.dsi.cabc_ports = BIT(port);  in parse_dsi_backlight_ports()
770 	switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {  in parse_dsi_backlight_ports()
772 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);  in parse_dsi_backlight_ports()
775 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);  in parse_dsi_backlight_ports()
779 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);  in parse_dsi_backlight_ports()
783 	if (!dev_priv->vbt.dsi.config->cabc_supported)  in parse_dsi_backlight_ports()
786 	switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {  in parse_dsi_backlight_ports()
788 		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);  in parse_dsi_backlight_ports()
791 		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);  in parse_dsi_backlight_ports()
795 		dev_priv->vbt.dsi.cabc_ports =  in parse_dsi_backlight_ports()
802 parse_mipi_config(struct drm_i915_private *dev_priv,  in parse_mipi_config()  argument
808 	int panel_type = dev_priv->vbt.panel_type;  in parse_mipi_config()
812 	if (!intel_bios_is_dsi_present(dev_priv, &port))  in parse_mipi_config()
816 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;  in parse_mipi_config()
843 	dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);  in parse_mipi_config()
844 	if (!dev_priv->vbt.dsi.config)  in parse_mipi_config()
847 	dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);  in parse_mipi_config()
848 	if (!dev_priv->vbt.dsi.pps) {  in parse_mipi_config()
849 		kfree(dev_priv->vbt.dsi.config);  in parse_mipi_config()
853 	parse_dsi_backlight_ports(dev_priv, bdb->version, port);  in parse_mipi_config()
856 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;  in parse_mipi_config()
1019 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)  in get_init_otp_deassert_fragment_len()  argument
1021 	const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];  in get_init_otp_deassert_fragment_len()
1024 	if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1))  in get_init_otp_deassert_fragment_len()
1052 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)  in fixup_mipi_sequences()  argument
1058 	if (!IS_VALLEYVIEW(dev_priv))  in fixup_mipi_sequences()
1062 	if (dev_priv->vbt.dsi.config->is_cmd_mode ||  in fixup_mipi_sequences()
1063 	    dev_priv->vbt.dsi.seq_version != 1)  in fixup_mipi_sequences()
1067 	if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||  in fixup_mipi_sequences()
1068 	    !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||  in fixup_mipi_sequences()
1069 	    dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])  in fixup_mipi_sequences()
1073 	len = get_init_otp_deassert_fragment_len(dev_priv);  in fixup_mipi_sequences()
1080 	init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];  in fixup_mipi_sequences()
1081 	dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);  in fixup_mipi_sequences()
1082 	if (!dev_priv->vbt.dsi.deassert_seq)  in fixup_mipi_sequences()
1084 	dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;  in fixup_mipi_sequences()
1085 	dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;  in fixup_mipi_sequences()
1087 	dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =  in fixup_mipi_sequences()
1088 		dev_priv->vbt.dsi.deassert_seq;  in fixup_mipi_sequences()
1092 	dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;  in fixup_mipi_sequences()
1096 parse_mipi_sequence(struct drm_i915_private *dev_priv,  in parse_mipi_sequence()  argument
1099 	int panel_type = dev_priv->vbt.panel_type;  in parse_mipi_sequence()
1107 	if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)  in parse_mipi_sequence()
1148 		dev_priv->vbt.dsi.sequence[seq_id] = data + index;  in parse_mipi_sequence()
1160 	dev_priv->vbt.dsi.data = data;  in parse_mipi_sequence()
1161 	dev_priv->vbt.dsi.size = seq_size;  in parse_mipi_sequence()
1162 	dev_priv->vbt.dsi.seq_version = sequence->version;  in parse_mipi_sequence()
1164 	fixup_mipi_sequences(dev_priv);  in parse_mipi_sequence()
1171 	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));  in parse_mipi_sequence()
1185 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,  in sanitize_ddc_pin()  argument
1189 		&dev_priv->vbt.ddi_port_info[port];  in sanitize_ddc_pin()
1196 		struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];  in sanitize_ddc_pin()
1221 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,  in sanitize_aux_ch()  argument
1225 		&dev_priv->vbt.ddi_port_info[port];  in sanitize_aux_ch()
1232 		struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];  in sanitize_aux_ch()
1273 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)  in map_ddc_pin()  argument
1278 	if (HAS_PCH_ICP(dev_priv)) {  in map_ddc_pin()
1281 	} else if (HAS_PCH_CNP(dev_priv)) {  in map_ddc_pin()
1297 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,  in parse_ddi_port()  argument
1301 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];  in parse_ddi_port()
1320 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in parse_ddi_port()
1321 		it = dev_priv->vbt.child_dev + i;  in parse_ddi_port()
1380 		ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);  in parse_ddi_port()
1381 		if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {  in parse_ddi_port()
1383 			sanitize_ddc_pin(dev_priv, port);  in parse_ddi_port()
1394 		sanitize_aux_ch(dev_priv, port);  in parse_ddi_port()
1462 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)  in parse_ddi_ports()  argument
1466 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))  in parse_ddi_ports()
1469 	if (!dev_priv->vbt.child_dev_num)  in parse_ddi_ports()
1476 		parse_ddi_port(dev_priv, port, bdb_version);  in parse_ddi_ports()
1480 parse_general_definitions(struct drm_i915_private *dev_priv,  in parse_general_definitions()  argument
1505 	if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))  in parse_general_definitions()
1506 		dev_priv->vbt.crt_ddc_pin = bus_pin;  in parse_general_definitions()
1553 	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);  in parse_general_definitions()
1554 	if (!dev_priv->vbt.child_dev) {  in parse_general_definitions()
1559 	dev_priv->vbt.child_dev_num = count;  in parse_general_definitions()
1571 		memcpy(dev_priv->vbt.child_dev + count, child,  in parse_general_definitions()
1579 init_vbt_defaults(struct drm_i915_private *dev_priv)  in init_vbt_defaults()  argument
1583 	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;  in init_vbt_defaults()
1586 	dev_priv->vbt.backlight.present = true;  in init_vbt_defaults()
1589 	dev_priv->vbt.lvds_dither = 1;  in init_vbt_defaults()
1592 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;  in init_vbt_defaults()
1595 	dev_priv->vbt.int_tv_support = 1;  in init_vbt_defaults()
1596 	dev_priv->vbt.int_crt_support = 1;  in init_vbt_defaults()
1599 	dev_priv->vbt.int_lvds_support = 1;  in init_vbt_defaults()
1602 	dev_priv->vbt.lvds_use_ssc = 1;  in init_vbt_defaults()
1607 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,  in init_vbt_defaults()
1608 			!HAS_PCH_SPLIT(dev_priv));  in init_vbt_defaults()
1609 	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);  in init_vbt_defaults()
1613 			&dev_priv->vbt.ddi_port_info[port];  in init_vbt_defaults()
1621 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)  in init_vbt_missing_defaults()  argument
1627 			&dev_priv->vbt.ddi_port_info[port];  in init_vbt_missing_defaults()
1717 void intel_bios_init(struct drm_i915_private *dev_priv)  in intel_bios_init()  argument
1719 	struct pci_dev *pdev = dev_priv->drm.pdev;  in intel_bios_init()
1720 	const struct vbt_header *vbt = dev_priv->opregion.vbt;  in intel_bios_init()
1724 	if (INTEL_INFO(dev_priv)->num_pipes == 0) {  in intel_bios_init()
1729 	init_vbt_defaults(dev_priv);  in intel_bios_init()
1752 	parse_general_features(dev_priv, bdb);  in intel_bios_init()
1753 	parse_general_definitions(dev_priv, bdb);  in intel_bios_init()
1754 	parse_lfp_panel_data(dev_priv, bdb);  in intel_bios_init()
1755 	parse_lfp_backlight(dev_priv, bdb);  in intel_bios_init()
1756 	parse_sdvo_panel_data(dev_priv, bdb);  in intel_bios_init()
1757 	parse_driver_features(dev_priv, bdb);  in intel_bios_init()
1758 	parse_edp(dev_priv, bdb);  in intel_bios_init()
1759 	parse_psr(dev_priv, bdb);  in intel_bios_init()
1760 	parse_mipi_config(dev_priv, bdb);  in intel_bios_init()
1761 	parse_mipi_sequence(dev_priv, bdb);  in intel_bios_init()
1764 	parse_sdvo_device_mapping(dev_priv, bdb->version);  in intel_bios_init()
1765 	parse_ddi_ports(dev_priv, bdb->version);  in intel_bios_init()
1770 		init_vbt_missing_defaults(dev_priv);  in intel_bios_init()
1781 void intel_bios_cleanup(struct drm_i915_private *dev_priv)  in intel_bios_cleanup()  argument
1783 	kfree(dev_priv->vbt.child_dev);  in intel_bios_cleanup()
1784 	dev_priv->vbt.child_dev = NULL;  in intel_bios_cleanup()
1785 	dev_priv->vbt.child_dev_num = 0;  in intel_bios_cleanup()
1786 	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);  in intel_bios_cleanup()
1787 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;  in intel_bios_cleanup()
1788 	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);  in intel_bios_cleanup()
1789 	dev_priv->vbt.lfp_lvds_vbt_mode = NULL;  in intel_bios_cleanup()
1790 	kfree(dev_priv->vbt.dsi.data);  in intel_bios_cleanup()
1791 	dev_priv->vbt.dsi.data = NULL;  in intel_bios_cleanup()
1792 	kfree(dev_priv->vbt.dsi.pps);  in intel_bios_cleanup()
1793 	dev_priv->vbt.dsi.pps = NULL;  in intel_bios_cleanup()
1794 	kfree(dev_priv->vbt.dsi.config);  in intel_bios_cleanup()
1795 	dev_priv->vbt.dsi.config = NULL;  in intel_bios_cleanup()
1796 	kfree(dev_priv->vbt.dsi.deassert_seq);  in intel_bios_cleanup()
1797 	dev_priv->vbt.dsi.deassert_seq = NULL;  in intel_bios_cleanup()
1807 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)  in intel_bios_is_tv_present()  argument
1812 	if (!dev_priv->vbt.int_tv_support)  in intel_bios_is_tv_present()
1815 	if (!dev_priv->vbt.child_dev_num)  in intel_bios_is_tv_present()
1818 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_tv_present()
1819 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_tv_present()
1849 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)  in intel_bios_is_lvds_present()  argument
1854 	if (!dev_priv->vbt.child_dev_num)  in intel_bios_is_lvds_present()
1857 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_lvds_present()
1858 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_lvds_present()
1868 		if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))  in intel_bios_is_lvds_present()
1884 		if (dev_priv->opregion.vbt)  in intel_bios_is_lvds_present()
1898 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)  in intel_bios_is_port_present()  argument
1916 	if (!dev_priv->vbt.child_dev_num)  in intel_bios_is_port_present()
1919 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_port_present()
1920 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_port_present()
1939 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)  in intel_bios_is_port_edp()  argument
1951 	if (HAS_DDI(dev_priv))  in intel_bios_is_port_edp()
1952 		return dev_priv->vbt.ddi_port_info[port].supports_edp;  in intel_bios_is_port_edp()
1954 	if (!dev_priv->vbt.child_dev_num)  in intel_bios_is_port_edp()
1957 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_port_edp()
1958 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_port_edp()
2004 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,  in intel_bios_is_port_dp_dual_mode()  argument
2010 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_port_dp_dual_mode()
2011 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_port_dp_dual_mode()
2027 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,  in intel_bios_is_dsi_present()  argument
2034 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_dsi_present()
2035 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_dsi_present()
2067 intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,  in intel_bios_is_port_hpd_inverted()  argument
2073 	if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))  in intel_bios_is_port_hpd_inverted()
2076 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_port_hpd_inverted()
2077 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_port_hpd_inverted()
2114 intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,  in intel_bios_is_lspcon_present()  argument
2120 	if (!HAS_LSPCON(dev_priv))  in intel_bios_is_lspcon_present()
2123 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in intel_bios_is_lspcon_present()
2124 		child = dev_priv->vbt.child_dev + i;  in intel_bios_is_lspcon_present()