32 static void i915_save_display(struct drm_i915_private *dev_priv)  in i915_save_display()  argument
35 	if (INTEL_GEN(dev_priv) <= 4)  in i915_save_display()
36 		dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);  in i915_save_display()
39 	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))  in i915_save_display()
40 		dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);  in i915_save_display()
43 static void i915_restore_display(struct drm_i915_private *dev_priv)  in i915_restore_display()  argument
46 	if (INTEL_GEN(dev_priv) <= 4)  in i915_restore_display()
47 		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);  in i915_restore_display()
50 	intel_fbc_global_disable(dev_priv);  in i915_restore_display()
53 	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))  in i915_restore_display()
54 		I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);  in i915_restore_display()
56 	i915_redisable_vga(dev_priv);  in i915_restore_display()
59 int i915_save_state(struct drm_i915_private *dev_priv)  in i915_save_state()  argument
61 	struct pci_dev *pdev = dev_priv->drm.pdev;  in i915_save_state()
64 	mutex_lock(&dev_priv->drm.struct_mutex);  in i915_save_state()
66 	i915_save_display(dev_priv);  in i915_save_state()
68 	if (IS_GEN4(dev_priv))  in i915_save_state()
70 				     &dev_priv->regfile.saveGCDGMBUS);  in i915_save_state()
73 	if (INTEL_GEN(dev_priv) < 7)  in i915_save_state()
74 		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);  in i915_save_state()
77 	dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);  in i915_save_state()
80 	if (IS_GEN2(dev_priv) && IS_MOBILE(dev_priv)) {  in i915_save_state()
82 			dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i));  in i915_save_state()
83 			dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));  in i915_save_state()
86 			dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i));  in i915_save_state()
87 	} else if (IS_GEN2(dev_priv)) {  in i915_save_state()
89 			dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));  in i915_save_state()
90 	} else if (HAS_GMCH_DISPLAY(dev_priv)) {  in i915_save_state()
92 			dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i));  in i915_save_state()
93 			dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i));  in i915_save_state()
96 			dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i));  in i915_save_state()
99 	mutex_unlock(&dev_priv->drm.struct_mutex);  in i915_save_state()
104 int i915_restore_state(struct drm_i915_private *dev_priv)  in i915_restore_state()  argument
106 	struct pci_dev *pdev = dev_priv->drm.pdev;  in i915_restore_state()
109 	mutex_lock(&dev_priv->drm.struct_mutex);  in i915_restore_state()
111 	if (IS_GEN4(dev_priv))  in i915_restore_state()
113 				      dev_priv->regfile.saveGCDGMBUS);  in i915_restore_state()
114 	i915_restore_display(dev_priv);  in i915_restore_state()
117 	if (INTEL_GEN(dev_priv) < 7)  in i915_restore_state()
118 		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |  in i915_restore_state()
122 	I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);  in i915_restore_state()
125 	if (IS_GEN2(dev_priv) && IS_MOBILE(dev_priv)) {  in i915_restore_state()
127 			I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);  in i915_restore_state()
128 			I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);  in i915_restore_state()
131 			I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);  in i915_restore_state()
132 	} else if (IS_GEN2(dev_priv)) {  in i915_restore_state()
134 			I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);  in i915_restore_state()
135 	} else if (HAS_GMCH_DISPLAY(dev_priv)) {  in i915_restore_state()
137 			I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);  in i915_restore_state()
138 			I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);  in i915_restore_state()
141 			I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);  in i915_restore_state()
144 	mutex_unlock(&dev_priv->drm.struct_mutex);  in i915_restore_state()
146 	intel_i2c_reset(dev_priv);  in i915_restore_state()