1511 			    u32 master_ctl, u32 gt_iir[4])  in gen8_gt_irq_ack()  argument
1523 	if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {  in gen8_gt_irq_ack()
1529 	if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {  in gen8_gt_irq_ack()
1535 	if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {  in gen8_gt_irq_ack()
1544 	if (master_ctl & GEN8_GT_VECS_IRQ) {  in gen8_gt_irq_ack()
1552 				u32 master_ctl, u32 gt_iir[4])  in gen8_gt_irq_handler()  argument
1554 	if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {  in gen8_gt_irq_handler()
1561 	if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {  in gen8_gt_irq_handler()
1568 	if (master_ctl & GEN8_GT_VECS_IRQ) {  in gen8_gt_irq_handler()
1573 	if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {  in gen8_gt_irq_handler()
2200 		u32 master_ctl, iir;  in cherryview_irq_handler()  local
2206 		master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;  in cherryview_irq_handler()
2209 		if (master_ctl == 0 && iir == 0)  in cherryview_irq_handler()
2231 		gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);  in cherryview_irq_handler()
2255 		gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);  in cherryview_irq_handler()
2725 gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)  in gen8_de_irq_handler()  argument
2731 	if (master_ctl & GEN8_DE_MISC_IRQ) {  in gen8_de_irq_handler()
2759 	if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) {  in gen8_de_irq_handler()
2770 	if (master_ctl & GEN8_DE_PORT_IRQ) {  in gen8_de_irq_handler()
2828 		if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe)))  in gen8_de_irq_handler()
2862 	    master_ctl & GEN8_DE_PCH_IRQ) {  in gen8_de_irq_handler()
2896 	u32 master_ctl;  in gen8_irq_handler()  local
2902 	master_ctl = I915_READ_FW(GEN8_MASTER_IRQ);  in gen8_irq_handler()
2903 	master_ctl &= ~GEN8_MASTER_IRQ_CONTROL;  in gen8_irq_handler()
2904 	if (!master_ctl)  in gen8_irq_handler()
2910 	gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);  in gen8_irq_handler()
2913 	if (master_ctl & ~GEN8_GT_IRQS) {  in gen8_irq_handler()
2915 		gen8_de_irq_handler(dev_priv, master_ctl);  in gen8_irq_handler()
2921 	gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);  in gen8_irq_handler()
3080 		     const u32 master_ctl)  in gen11_gt_irq_handler()  argument
3087 		if (master_ctl & GEN11_GT_DW_IRQ(bank))  in gen11_gt_irq_handler()
3095 gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl)  in gen11_gu_misc_irq_ack()  argument
3100 	if (!(master_ctl & GEN11_GU_MISC_IRQ))  in gen11_gu_misc_irq_ack()
3121 	u32 master_ctl;  in gen11_irq_handler()  local
3127 	master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);  in gen11_irq_handler()
3128 	master_ctl &= ~GEN11_MASTER_IRQ;  in gen11_irq_handler()
3129 	if (!master_ctl)  in gen11_irq_handler()
3136 	gen11_gt_irq_handler(i915, master_ctl);  in gen11_irq_handler()
3139 	if (master_ctl & GEN11_DISPLAY_IRQ) {  in gen11_irq_handler()
3151 	gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);  in gen11_irq_handler()
3154 	raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ | master_ctl);  in gen11_irq_handler()