1466 			       u32 gt_iir)  in ilk_gt_irq_handler()  argument
1468 	if (gt_iir & GT_RENDER_USER_INTERRUPT)  in ilk_gt_irq_handler()
1470 	if (gt_iir & ILK_BSD_USER_INTERRUPT)  in ilk_gt_irq_handler()
1475 			       u32 gt_iir)  in snb_gt_irq_handler()  argument
1477 	if (gt_iir & GT_RENDER_USER_INTERRUPT)  in snb_gt_irq_handler()
1479 	if (gt_iir & GT_BSD_USER_INTERRUPT)  in snb_gt_irq_handler()
1481 	if (gt_iir & GT_BLT_USER_INTERRUPT)  in snb_gt_irq_handler()
1484 	if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |  in snb_gt_irq_handler()
1487 		DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);  in snb_gt_irq_handler()
1489 	if (gt_iir & GT_PARITY_ERROR(dev_priv))  in snb_gt_irq_handler()
1490 		ivybridge_parity_error_irq_handler(dev_priv, gt_iir);  in snb_gt_irq_handler()
1511 			    u32 master_ctl, u32 gt_iir[4])  in gen8_gt_irq_ack()
1524 		gt_iir[0] = raw_reg_read(regs, GEN8_GT_IIR(0));  in gen8_gt_irq_ack()
1525 		if (likely(gt_iir[0]))  in gen8_gt_irq_ack()
1526 			raw_reg_write(regs, GEN8_GT_IIR(0), gt_iir[0]);  in gen8_gt_irq_ack()
1530 		gt_iir[1] = raw_reg_read(regs, GEN8_GT_IIR(1));  in gen8_gt_irq_ack()
1531 		if (likely(gt_iir[1]))  in gen8_gt_irq_ack()
1532 			raw_reg_write(regs, GEN8_GT_IIR(1), gt_iir[1]);  in gen8_gt_irq_ack()
1536 		gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));  in gen8_gt_irq_ack()
1537 		if (likely(gt_iir[2] & (i915->pm_rps_events |  in gen8_gt_irq_ack()
1540 				      gt_iir[2] & (i915->pm_rps_events |  in gen8_gt_irq_ack()
1545 		gt_iir[3] = raw_reg_read(regs, GEN8_GT_IIR(3));  in gen8_gt_irq_ack()
1546 		if (likely(gt_iir[3]))  in gen8_gt_irq_ack()
1547 			raw_reg_write(regs, GEN8_GT_IIR(3), gt_iir[3]);  in gen8_gt_irq_ack()
1552 				u32 master_ctl, u32 gt_iir[4])  in gen8_gt_irq_handler()
1556 				    gt_iir[0] >> GEN8_RCS_IRQ_SHIFT);  in gen8_gt_irq_handler()
1558 				    gt_iir[0] >> GEN8_BCS_IRQ_SHIFT);  in gen8_gt_irq_handler()
1563 				    gt_iir[1] >> GEN8_VCS1_IRQ_SHIFT);  in gen8_gt_irq_handler()
1565 				    gt_iir[1] >> GEN8_VCS2_IRQ_SHIFT);  in gen8_gt_irq_handler()
1570 				    gt_iir[3] >> GEN8_VECS_IRQ_SHIFT);  in gen8_gt_irq_handler()
1574 		gen6_rps_irq_handler(i915, gt_iir[2]);  in gen8_gt_irq_handler()
1575 		gen9_guc_irq_handler(i915, gt_iir[2]);  in gen8_gt_irq_handler()
1858 static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir)  in gen9_guc_irq_handler()  argument
1860 	if (gt_iir & GEN9_GUC_TO_HOST_INT_EVENT)  in gen9_guc_irq_handler()
2114 		u32 iir, gt_iir, pm_iir;  in valleyview_irq_handler()  local
2119 		gt_iir = I915_READ(GTIIR);  in valleyview_irq_handler()
2123 		if (gt_iir == 0 && pm_iir == 0 && iir == 0)  in valleyview_irq_handler()
2145 		if (gt_iir)  in valleyview_irq_handler()
2146 			I915_WRITE(GTIIR, gt_iir);  in valleyview_irq_handler()
2171 		if (gt_iir)  in valleyview_irq_handler()
2172 			snb_gt_irq_handler(dev_priv, gt_iir);  in valleyview_irq_handler()
2203 		u32 gt_iir[4];  in cherryview_irq_handler()  local
2231 		gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);  in cherryview_irq_handler()
2255 		gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);  in cherryview_irq_handler()
2610 	u32 de_iir, gt_iir, de_ier, sde_ier = 0;  in ironlake_irq_handler()  local
2635 	gt_iir = I915_READ(GTIIR);  in ironlake_irq_handler()
2636 	if (gt_iir) {  in ironlake_irq_handler()
2637 		I915_WRITE(GTIIR, gt_iir);  in ironlake_irq_handler()
2640 			snb_gt_irq_handler(dev_priv, gt_iir);  in ironlake_irq_handler()
2642 			ilk_gt_irq_handler(dev_priv, gt_iir);  in ironlake_irq_handler()
2897 	u32 gt_iir[4];  in gen8_irq_handler()  local
2910 	gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);  in gen8_irq_handler()
2921 	gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);  in gen8_irq_handler()