Lines Matching refs:I915_WRITE
136 I915_WRITE(GEN8_##type##_IMR(which), 0xffffffff); \
138 I915_WRITE(GEN8_##type##_IER(which), 0); \
139 I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \
141 I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \
146 I915_WRITE(type##IMR, 0xffffffff); \
148 I915_WRITE(type##IER, 0); \
149 I915_WRITE(type##IIR, 0xffffffff); \
151 I915_WRITE(type##IIR, 0xffffffff); \
178 I915_WRITE(reg, 0xffffffff); in gen3_assert_iir_is_zero()
180 I915_WRITE(reg, 0xffffffff); in gen3_assert_iir_is_zero()
202 I915_WRITE(GEN8_##type##_IER(which), (ier_val)); \
203 I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \
209 I915_WRITE(type##IER, (ier_val)); \
210 I915_WRITE(type##IMR, (imr_val)); \
238 I915_WRITE(PORT_HOTPLUG_EN, val); in i915_hotplug_interrupt_update_locked()
322 I915_WRITE(DEIMR, dev_priv->irq_mask); in ilk_update_display_irq()
346 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in ilk_update_gt_irq()
409 I915_WRITE(gen6_pm_imr(dev_priv), dev_priv->pm_imr); in snb_update_pm_irq()
441 I915_WRITE(reg, reset_mask); in gen6_reset_pm_iir()
442 I915_WRITE(reg, reset_mask); in gen6_reset_pm_iir()
451 I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier); in gen6_enable_pm_irq()
462 I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier); in gen6_disable_pm_irq()
517 I915_WRITE(GEN6_PMINTRMSK, gen6_sanitize_rps_pm_mask(dev_priv, ~0u)); in gen6_disable_rps_interrupts()
601 I915_WRITE(GEN8_DE_PORT_IMR, new_val); in bdw_update_port_irq()
633 I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]); in bdw_update_pipe_irq()
659 I915_WRITE(SDEIMR, sdeimr); in ibx_display_interrupt_update()
723 I915_WRITE(reg, enable_mask | status_mask); in i915_enable_pipestat()
746 I915_WRITE(reg, enable_mask | status_mask); in i915_disable_pipestat()
1393 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in ivybridge_parity_work()
1412 I915_WRITE(reg, GEN7_PARITY_ERROR_VALID | GEN7_L3CDERRST1_ENABLE); in ivybridge_parity_work()
1434 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in ivybridge_parity_work()
1869 I915_WRITE(PIPESTAT(pipe), in i9xx_pipestat_irq_reset()
1935 I915_WRITE(reg, pipe_stats[pipe]); in i9xx_pipestat_irq_ack()
1936 I915_WRITE(reg, enable_mask); in i9xx_pipestat_irq_ack()
2058 I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status); in i9xx_hpd_irq_ack()
2141 I915_WRITE(VLV_MASTER_IER, 0); in valleyview_irq_handler()
2143 I915_WRITE(VLV_IER, 0); in valleyview_irq_handler()
2146 I915_WRITE(GTIIR, gt_iir); in valleyview_irq_handler()
2148 I915_WRITE(GEN6_PMIIR, pm_iir); in valleyview_irq_handler()
2166 I915_WRITE(VLV_IIR, iir); in valleyview_irq_handler()
2168 I915_WRITE(VLV_IER, ier); in valleyview_irq_handler()
2169 I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE); in valleyview_irq_handler()
2227 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_handler()
2229 I915_WRITE(VLV_IER, 0); in cherryview_irq_handler()
2250 I915_WRITE(VLV_IIR, iir); in cherryview_irq_handler()
2252 I915_WRITE(VLV_IER, ier); in cherryview_irq_handler()
2253 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_handler()
2289 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); in ibx_hpd_irq_handler()
2368 I915_WRITE(GEN7_ERR_INT, err_int); in ivb_err_int_handler()
2383 I915_WRITE(SERR_INT, serr_int); in cpt_serr_int_handler()
2432 I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg); in icp_irq_handler()
2444 I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg); in icp_irq_handler()
2470 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); in spt_irq_handler()
2481 I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg); in spt_irq_handler()
2502 I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg); in ilk_hpd_irq_handler()
2550 I915_WRITE(SDEIIR, pch_iir); in ilk_display_irq_handler()
2573 I915_WRITE(EDP_PSR_IIR, psr_iir); in ivb_display_irq_handler()
2594 I915_WRITE(SDEIIR, pch_iir); in ivb_display_irq_handler()
2621 I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL); in ironlake_irq_handler()
2630 I915_WRITE(SDEIER, 0); in ironlake_irq_handler()
2637 I915_WRITE(GTIIR, gt_iir); in ironlake_irq_handler()
2647 I915_WRITE(DEIIR, de_iir); in ironlake_irq_handler()
2658 I915_WRITE(GEN6_PMIIR, pm_iir); in ironlake_irq_handler()
2664 I915_WRITE(DEIER, de_ier); in ironlake_irq_handler()
2666 I915_WRITE(SDEIER, sde_ier); in ironlake_irq_handler()
2681 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); in bxt_hpd_irq_handler()
2700 I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg); in gen11_hpd_irq_handler()
2711 I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg); in gen11_hpd_irq_handler()
2736 I915_WRITE(GEN8_DE_MISC_IIR, iir); in gen8_de_irq_handler()
2748 I915_WRITE(EDP_PSR_IIR, psr_iir); in gen8_de_irq_handler()
2762 I915_WRITE(GEN11_DE_HPD_IIR, iir); in gen8_de_irq_handler()
2776 I915_WRITE(GEN8_DE_PORT_IIR, iir); in gen8_de_irq_handler()
2838 I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir); in gen8_de_irq_handler()
2870 I915_WRITE(SDEIIR, iir); in gen8_de_irq_handler()
3217 I915_WRITE(PGTBL_ER, I915_READ(PGTBL_ER)); in i915_clear_error_registers()
3220 I915_WRITE(IPEIR, I915_READ(IPEIR)); in i915_clear_error_registers()
3222 I915_WRITE(IPEIR_I965, I915_READ(IPEIR_I965)); in i915_clear_error_registers()
3224 I915_WRITE(EIR, I915_READ(EIR)); in i915_clear_error_registers()
3232 I915_WRITE(EMR, I915_READ(EMR) | eir); in i915_clear_error_registers()
3233 I915_WRITE(IIR, I915_MASTER_ERROR_INTERRUPT); in i915_clear_error_registers()
3461 I915_WRITE(SERR_INT, 0xffffffff); in ibx_irq_reset()
3480 I915_WRITE(SDEIER, 0xffffffff); in ibx_irq_pre_postinstall()
3494 I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV); in vlv_display_irq_reset()
3496 I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); in vlv_display_irq_reset()
3499 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); in vlv_display_irq_reset()
3543 I915_WRITE(HWSTAM, 0xffffffff); in ironlake_irq_reset()
3547 I915_WRITE(GEN7_ERR_INT, 0xffffffff); in ironlake_irq_reset()
3550 I915_WRITE(EDP_PSR_IMR, 0xffffffff); in ironlake_irq_reset()
3551 I915_WRITE(EDP_PSR_IIR, 0xffffffff); in ironlake_irq_reset()
3563 I915_WRITE(VLV_MASTER_IER, 0); in valleyview_irq_reset()
3587 I915_WRITE(GEN8_MASTER_IRQ, 0); in gen8_irq_reset()
3592 I915_WRITE(EDP_PSR_IMR, 0xffffffff); in gen8_irq_reset()
3593 I915_WRITE(EDP_PSR_IIR, 0xffffffff); in gen8_irq_reset()
3611 I915_WRITE(GEN11_RENDER_COPY_INTR_ENABLE, 0); in gen11_gt_irq_reset()
3612 I915_WRITE(GEN11_VCS_VECS_INTR_ENABLE, 0); in gen11_gt_irq_reset()
3615 I915_WRITE(GEN11_RCS0_RSVD_INTR_MASK, ~0); in gen11_gt_irq_reset()
3616 I915_WRITE(GEN11_BCS_RSVD_INTR_MASK, ~0); in gen11_gt_irq_reset()
3617 I915_WRITE(GEN11_VCS0_VCS1_INTR_MASK, ~0); in gen11_gt_irq_reset()
3618 I915_WRITE(GEN11_VCS2_VCS3_INTR_MASK, ~0); in gen11_gt_irq_reset()
3619 I915_WRITE(GEN11_VECS0_VECS1_INTR_MASK, ~0); in gen11_gt_irq_reset()
3621 I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0); in gen11_gt_irq_reset()
3622 I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_MASK, ~0); in gen11_gt_irq_reset()
3630 I915_WRITE(GEN11_GFX_MSTR_IRQ, 0); in gen11_irq_reset()
3635 I915_WRITE(GEN11_DISPLAY_INT_CTL, 0); in gen11_irq_reset()
3698 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_reset()
3746 I915_WRITE(PCH_PORT_HOTPLUG, hotplug); in ibx_hpd_detection_setup()
3773 I915_WRITE(SHOTPLUG_CTL_DDI, hotplug); in icp_hpd_detection_setup()
3780 I915_WRITE(SHOTPLUG_CTL_TC, hotplug); in icp_hpd_detection_setup()
3804 I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug); in gen11_hpd_detection_setup()
3811 I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug); in gen11_hpd_detection_setup()
3824 I915_WRITE(GEN11_DE_HPD_IMR, val); in gen11_hpd_irq_setup()
3842 I915_WRITE(SOUTH_CHICKEN1, val); in spt_hpd_detection_setup()
3851 I915_WRITE(PCH_PORT_HOTPLUG, hotplug); in spt_hpd_detection_setup()
3855 I915_WRITE(PCH_PORT_HOTPLUG2, hotplug); in spt_hpd_detection_setup()
3883 I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, hotplug); in ilk_hpd_detection_setup()
3940 I915_WRITE(PCH_PORT_HOTPLUG, hotplug); in __bxt_hpd_detection_setup()
3976 I915_WRITE(SDEIMR, ~mask); in ibx_irq_postinstall()
4115 I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE); in valleyview_irq_postinstall()
4233 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_irq_postinstall()
4246 I915_WRITE(GEN11_RENDER_COPY_INTR_ENABLE, irqs << 16 | irqs); in gen11_gt_irq_postinstall()
4247 I915_WRITE(GEN11_VCS_VECS_INTR_ENABLE, irqs << 16 | irqs); in gen11_gt_irq_postinstall()
4250 I915_WRITE(GEN11_RCS0_RSVD_INTR_MASK, ~(irqs << 16)); in gen11_gt_irq_postinstall()
4251 I915_WRITE(GEN11_BCS_RSVD_INTR_MASK, ~(irqs << 16)); in gen11_gt_irq_postinstall()
4252 I915_WRITE(GEN11_VCS0_VCS1_INTR_MASK, ~(irqs | irqs << 16)); in gen11_gt_irq_postinstall()
4253 I915_WRITE(GEN11_VCS2_VCS3_INTR_MASK, ~(irqs | irqs << 16)); in gen11_gt_irq_postinstall()
4254 I915_WRITE(GEN11_VECS0_VECS1_INTR_MASK, ~(irqs | irqs << 16)); in gen11_gt_irq_postinstall()
4262 I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0); in gen11_gt_irq_postinstall()
4263 I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_MASK, ~0); in gen11_gt_irq_postinstall()
4272 I915_WRITE(SDEIER, 0xffffffff); in icp_irq_postinstall()
4276 I915_WRITE(SDEIMR, ~mask); in icp_irq_postinstall()
4294 I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE); in gen11_irq_postinstall()
4296 I915_WRITE(GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ); in gen11_irq_postinstall()
4313 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_postinstall()
4407 I915_WRITE(EIR, *eir); in i9xx_error_irq_ack()
4424 I915_WRITE(EMR, 0xffffffff); in i9xx_error_irq_ack()
4425 I915_WRITE(EMR, emr | *eir_stuck); in i9xx_error_irq_ack()
4489 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); in i915_irq_reset()
4494 I915_WRITE(HWSTAM, 0xffffffff); in i915_irq_reset()
4504 I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE | in i915_irq_postinstall()
4577 I915_WRITE(IIR, iir); in i915_irq_handler()
4601 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); in i965_irq_reset()
4605 I915_WRITE(HWSTAM, 0xffffffff); in i965_irq_reset()
4629 I915_WRITE(EMR, error_mask); in i965_irq_postinstall()
4724 I915_WRITE(IIR, iir); in i965_irq_handler()