328 struct drm_i915_private;
333 	struct drm_i915_private *dev_priv;
408 	void (*get_cdclk)(struct drm_i915_private *dev_priv,
410 	void (*set_cdclk)(struct drm_i915_private *dev_priv,
412 	int (*get_fifo_size)(struct drm_i915_private *dev_priv,
448 	void (*init_clock_gating)(struct drm_i915_private *dev_priv);
449 	void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
664 	struct drm_i915_private *dev_priv;
840 struct drm_i915_private;
850 	void (*sync_hw)(struct drm_i915_private *dev_priv,
857 	void (*enable)(struct drm_i915_private *dev_priv,
863 	void (*disable)(struct drm_i915_private *dev_priv,
866 	bool (*is_enabled)(struct drm_i915_private *dev_priv,
1419 	struct drm_i915_private *dev_priv;
1473 	bool (*is_valid_b_counter_reg)(struct drm_i915_private *dev_priv,
1480 	bool (*is_valid_mux_reg)(struct drm_i915_private *dev_priv, u32 addr);
1486 	bool (*is_valid_flex_reg)(struct drm_i915_private *dev_priv, u32 addr);
1503 	void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
1511 	int (*enable_metric_set)(struct drm_i915_private *dev_priv,
1518 	void (*disable_metric_set)(struct drm_i915_private *dev_priv);
1523 	void (*oa_enable)(struct drm_i915_private *dev_priv);
1528 	void (*oa_disable)(struct drm_i915_private *dev_priv);
1546 	u32 (*oa_hw_tail_read)(struct drm_i915_private *dev_priv);
1554 struct drm_i915_private {  struct
2058 		void (*resume)(struct drm_i915_private *);  argument
2126 static inline struct drm_i915_private *to_i915(const struct drm_device *dev)  in to_i915()  argument
2128 	return container_of(dev, struct drm_i915_private, drm);  in to_i915()
2131 static inline struct drm_i915_private *kdev_to_i915(struct device *kdev)  in kdev_to_i915()
2136 static inline struct drm_i915_private *wopcm_to_i915(struct intel_wopcm *wopcm)  in wopcm_to_i915()
2138 	return container_of(wopcm, struct drm_i915_private, wopcm);  in wopcm_to_i915()
2141 static inline struct drm_i915_private *guc_to_i915(struct intel_guc *guc)  in guc_to_i915()
2143 	return container_of(guc, struct drm_i915_private, guc);  in guc_to_i915()
2146 static inline struct drm_i915_private *huc_to_i915(struct intel_huc *huc)  in huc_to_i915()
2148 	return container_of(huc, struct drm_i915_private, huc);  in huc_to_i915()
2298 intel_info(const struct drm_i915_private *dev_priv)  in intel_info()
2678 static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv)  in intel_scanout_needs_vtd_wa()
2684 intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *dev_priv)  in intel_ggtt_update_needs_vtd_wa()
2689 int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
2694 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
2711 extern int intel_gpu_reset(struct drm_i915_private *dev_priv, u32 engine_mask);
2712 extern bool intel_has_gpu_reset(struct drm_i915_private *dev_priv);
2714 extern void i915_reset(struct drm_i915_private *i915,
2720 extern bool intel_has_reset_engine(struct drm_i915_private *dev_priv);
2721 extern int intel_reset_guc(struct drm_i915_private *dev_priv);
2725 extern void intel_hangcheck_init(struct drm_i915_private *dev_priv);
2726 extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
2727 extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
2728 extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv);
2729 extern void i915_update_gfx_val(struct drm_i915_private *dev_priv);
2730 int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool on);
2732 int intel_engines_init_mmio(struct drm_i915_private *dev_priv);
2733 int intel_engines_init(struct drm_i915_private *dev_priv);
2735 u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv);
2738 void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
2740 void intel_hpd_init(struct drm_i915_private *dev_priv);
2741 void intel_hpd_init_work(struct drm_i915_private *dev_priv);
2742 void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
2743 enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
2745 bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
2746 void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
2749 static inline void i915_queue_hangcheck(struct drm_i915_private *dev_priv)  in i915_queue_hangcheck()
2767 void i915_handle_error(struct drm_i915_private *dev_priv,
2773 extern void intel_irq_init(struct drm_i915_private *dev_priv);
2774 extern void intel_irq_fini(struct drm_i915_private *dev_priv);
2775 int intel_irq_install(struct drm_i915_private *dev_priv);
2776 void intel_irq_uninstall(struct drm_i915_private *dev_priv);
2778 static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)  in intel_gvt_active()
2783 static inline bool intel_vgpu_active(struct drm_i915_private *dev_priv)  in intel_vgpu_active()
2788 u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,
2791 i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
2795 i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
2798 void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv);
2799 void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
2800 void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv,
2803 void ilk_update_display_irq(struct drm_i915_private *dev_priv,
2807 ilk_enable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits)  in ilk_enable_display_irq()
2812 ilk_disable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits)  in ilk_disable_display_irq()
2816 void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,
2820 static inline void bdw_enable_pipe_irq(struct drm_i915_private *dev_priv,  in bdw_enable_pipe_irq()
2825 static inline void bdw_disable_pipe_irq(struct drm_i915_private *dev_priv,  in bdw_disable_pipe_irq()
2830 void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
2834 ibx_enable_display_interrupt(struct drm_i915_private *dev_priv, uint32_t bits)  in ibx_enable_display_interrupt()
2839 ibx_disable_display_interrupt(struct drm_i915_private *dev_priv, uint32_t bits)  in ibx_disable_display_interrupt()
2877 int i915_gem_init_userptr(struct drm_i915_private *dev_priv);
2878 void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv);
2885 void i915_gem_sanitize(struct drm_i915_private *i915);
2886 int i915_gem_init_early(struct drm_i915_private *dev_priv);
2887 void i915_gem_cleanup_early(struct drm_i915_private *dev_priv);
2888 void i915_gem_load_init_fences(struct drm_i915_private *dev_priv);
2889 int i915_gem_freeze(struct drm_i915_private *dev_priv);
2890 int i915_gem_freeze_late(struct drm_i915_private *dev_priv);
2892 void *i915_gem_object_alloc(struct drm_i915_private *dev_priv);
2897 i915_gem_object_create(struct drm_i915_private *dev_priv, u64 size);
2899 i915_gem_object_create_from_data(struct drm_i915_private *dev_priv,
2904 static inline void i915_gem_drain_freed_objects(struct drm_i915_private *i915)  in i915_gem_drain_freed_objects()
2920 static inline void i915_gem_drain_workqueue(struct drm_i915_private *i915)  in i915_gem_drain_workqueue()
2950 void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
3138 int i915_gem_reset_prepare(struct drm_i915_private *dev_priv);
3139 void i915_gem_reset(struct drm_i915_private *dev_priv,
3142 void i915_gem_reset_finish(struct drm_i915_private *dev_priv);
3143 void i915_gem_set_wedged(struct drm_i915_private *dev_priv);
3144 bool i915_gem_unset_wedged(struct drm_i915_private *dev_priv);
3149 void i915_gem_init_mmio(struct drm_i915_private *i915);
3150 int __must_check i915_gem_init(struct drm_i915_private *dev_priv);
3151 int __must_check i915_gem_init_hw(struct drm_i915_private *dev_priv);
3152 void i915_gem_init_swizzling(struct drm_i915_private *dev_priv);
3153 void i915_gem_fini(struct drm_i915_private *dev_priv);
3154 void i915_gem_cleanup_engines(struct drm_i915_private *dev_priv);
3155 int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv,
3157 int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv);
3158 void i915_gem_suspend_late(struct drm_i915_private *dev_priv);
3159 void i915_gem_resume(struct drm_i915_private *dev_priv);
3184 int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
3204 i915_reserve_fence(struct drm_i915_private *dev_priv);
3207 void i915_gem_revoke_fences(struct drm_i915_private *dev_priv);
3208 void i915_gem_restore_fences(struct drm_i915_private *dev_priv);
3210 void i915_gem_detect_bit_6_swizzle(struct drm_i915_private *dev_priv);
3257 void i915_gem_flush_ggtt_writes(struct drm_i915_private *dev_priv);
3260 static inline void i915_gem_chipset_flush(struct drm_i915_private *dev_priv)  in i915_gem_chipset_flush()
3268 int i915_gem_stolen_insert_node(struct drm_i915_private *dev_priv,
3271 int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *dev_priv,
3275 void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,
3277 int i915_gem_init_stolen(struct drm_i915_private *dev_priv);
3280 i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,
3283 i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv,
3290 i915_gem_object_create_internal(struct drm_i915_private *dev_priv,
3294 unsigned long i915_gem_shrink(struct drm_i915_private *i915,
3303 unsigned long i915_gem_shrink_all(struct drm_i915_private *i915);
3304 void i915_gem_shrinker_register(struct drm_i915_private *i915);
3305 void i915_gem_shrinker_unregister(struct drm_i915_private *i915);
3311 	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);  in i915_gem_object_needs_bit17_swizzle()
3317 u32 i915_gem_fence_size(struct drm_i915_private *dev_priv, u32 size,
3319 u32 i915_gem_fence_alignment(struct drm_i915_private *dev_priv, u32 size,
3324 int i915_debugfs_register(struct drm_i915_private *dev_priv);
3326 void intel_display_crc_init(struct drm_i915_private *dev_priv);
3328 static inline int i915_debugfs_register(struct drm_i915_private *dev_priv) {return 0;}  in i915_debugfs_register()
3331 static inline void intel_display_crc_init(struct drm_i915_private *dev_priv) {}  in intel_display_crc_init()
3334 const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
3337 int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv);
3348 extern void i915_perf_init(struct drm_i915_private *dev_priv);
3349 extern void i915_perf_fini(struct drm_i915_private *dev_priv);
3350 extern void i915_perf_register(struct drm_i915_private *dev_priv);
3351 extern void i915_perf_unregister(struct drm_i915_private *dev_priv);
3354 extern int i915_save_state(struct drm_i915_private *dev_priv);
3355 extern int i915_restore_state(struct drm_i915_private *dev_priv);
3358 void i915_setup_sysfs(struct drm_i915_private *dev_priv);
3359 void i915_teardown_sysfs(struct drm_i915_private *dev_priv);
3362 int  intel_lpe_audio_init(struct drm_i915_private *dev_priv);
3363 void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);
3364 void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv);
3365 void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
3370 extern int intel_setup_gmbus(struct drm_i915_private *dev_priv);
3371 extern void intel_teardown_gmbus(struct drm_i915_private *dev_priv);
3372 extern bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
3377 intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin);
3384 extern void intel_i2c_reset(struct drm_i915_private *dev_priv);
3387 void intel_bios_init(struct drm_i915_private *dev_priv);
3388 void intel_bios_cleanup(struct drm_i915_private *dev_priv);
3390 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
3391 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);
3392 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
3393 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
3394 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
3395 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
3396 bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
3398 bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
3412 mkwrite_device_info(struct drm_i915_private *dev_priv)  in mkwrite_device_info()
3423 extern int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv,
3426 extern void i915_redisable_vga(struct drm_i915_private *dev_priv);
3427 extern void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
3428 extern bool ironlake_set_drps(struct drm_i915_private *dev_priv, u8 val);
3429 extern void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
3430 extern int intel_set_rps(struct drm_i915_private *dev_priv, u8 val);
3431 extern void intel_rps_mark_interactive(struct drm_i915_private *i915,
3433 extern bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
3441 intel_overlay_capture_error_state(struct drm_i915_private *dev_priv);
3446 intel_display_capture_error_state(struct drm_i915_private *dev_priv);
3450 int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);
3451 int sandybridge_pcode_write_timeout(struct drm_i915_private *dev_priv, u32 mbox,
3457 int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request,
3461 u32 vlv_punit_read(struct drm_i915_private *dev_priv, u32 addr);
3462 int vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val);
3463 u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
3464 u32 vlv_iosf_sb_read(struct drm_i915_private *dev_priv, u8 port, u32 reg);
3465 void vlv_iosf_sb_write(struct drm_i915_private *dev_priv, u8 port, u32 reg, u32 val);
3466 u32 vlv_cck_read(struct drm_i915_private *dev_priv, u32 reg);
3467 void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3468 u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
3469 void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3470 u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);
3471 void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3472 u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
3473 void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
3474 u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
3476 void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
3478 u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
3479 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3482 void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,
3484 void bxt_ddi_phy_set_signal_level(struct drm_i915_private *dev_priv,
3487 void bxt_ddi_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy);
3488 void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy);
3489 bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,
3491 bool bxt_ddi_phy_verify_state(struct drm_i915_private *dev_priv,
3522 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
3523 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
3524 u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
3527 u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat1);
3529 static inline u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,  in intel_rc6_residency_us()
3578 static inline uint##x##_t __raw_i915_read##x(const struct drm_i915_private *dev_priv, \
3585 static inline void __raw_i915_write##x(const struct drm_i915_private *dev_priv, \
3639 static inline i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)  in i915_vgacntrl_reg()
3777 void i915_memcpy_init_early(struct drm_i915_private *dev_priv);
3801 static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)  in intel_hws_csb_write_index()