Lines Matching defs:drm_i915_private
1554 struct drm_i915_private { struct
1555 struct drm_device drm;
1557 struct kmem_cache *objects;
1558 struct kmem_cache *vmas;
1559 struct kmem_cache *luts;
1560 struct kmem_cache *requests;
1561 struct kmem_cache *dependencies;
1562 struct kmem_cache *priorities;
1564 const struct intel_device_info info;
1565 struct intel_driver_caps caps;
1574 struct resource dsm;
1578 struct resource dsm_reserved;
1589 resource_size_t stolen_usable_size; /* Total size minus reserved ranges */
1591 void __iomem *regs;
1593 struct intel_uncore uncore;
1595 struct i915_virtual_gpu vgpu;
1597 struct intel_gvt *gvt;
1599 struct intel_wopcm wopcm;
1601 struct intel_huc huc;
1602 struct intel_guc guc;
1604 struct intel_csr csr;
1606 struct intel_gmbus gmbus[GMBUS_NUM_PINS];
1610 struct mutex gmbus_mutex;
1615 uint32_t gpio_mmio_base;
1618 uint32_t mipi_mmio_base;
1620 uint32_t psr_mmio_base;
1622 uint32_t pps_mmio_base;
1624 wait_queue_head_t gmbus_wait_queue;
1626 struct pci_dev *bridge_dev;
1627 struct intel_engine_cs *engine[I915_NUM_ENGINES];
1629 struct i915_gem_context *kernel_context;
1631 struct i915_gem_context *preempt_context;
1632 struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]
1635 struct drm_dma_handle *status_page_dmah;
1636 struct resource mch_res;
1639 spinlock_t irq_lock;
1641 bool display_irqs_enabled;
1644 struct pm_qos_request pm_qos;
1647 struct mutex sb_lock;
1650 union {
1654 u32 gt_irq_mask;
1655 u32 pm_imr;
1656 u32 pm_ier;
1657 u32 pm_rps_events;
1658 u32 pm_guc_events;
1659 u32 pipestat_irq_mask[I915_MAX_PIPES];
1661 struct i915_hotplug hotplug;
1662 struct intel_fbc fbc;
1663 struct i915_drrs drrs;
1664 struct intel_opregion opregion;
1665 struct intel_vbt_data vbt;
1667 bool preserve_bios_swizzle;
1670 struct intel_overlay *overlay;
1673 struct mutex backlight_lock;
1676 bool no_aux_handshake;
1679 struct mutex pps_mutex;
1681 struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */
1682 int num_fence_regs; /* 8 on pre-965, 16 otherwise */
1684 unsigned int fsb_freq, mem_freq, is_ddr3;
1685 unsigned int skl_preferred_vco_freq;
1686 unsigned int max_cdclk_freq;
1688 unsigned int max_dotclk_freq;
1689 unsigned int rawclk_freq;
1690 unsigned int hpll_freq;
1691 unsigned int fdi_pll_freq;
1692 unsigned int czclk_freq;
1694 struct {
1710 } cdclk;
1719 struct workqueue_struct *wq;
1722 struct workqueue_struct *modeset_wq;
1725 struct drm_i915_display_funcs display;
1728 enum intel_pch pch_type;
1729 unsigned short pch_id;
1731 unsigned long quirks;
1733 struct drm_atomic_state *modeset_restore_state;
1734 struct drm_modeset_acquire_ctx reset_ctx;
1736 struct i915_ggtt ggtt; /* VM representing the global address space */
1738 struct i915_gem_mm mm;
1740 struct mutex mm_lock;
1742 struct intel_ppat ppat;
1746 struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
1747 struct intel_crtc *pipe_to_crtc_mapping[I915_MAX_PIPES];
1750 struct intel_pipe_crc pipe_crc[I915_MAX_PIPES];
1754 int num_shared_dpll;
1755 struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
1756 const struct intel_dpll_mgr *dpll_mgr;
1763 struct mutex dpll_lock;
1765 unsigned int active_crtcs;
1767 int min_cdclk[I915_MAX_PIPES];
1769 u8 min_voltage_level[I915_MAX_PIPES];
1771 int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
1773 struct i915_workarounds workarounds;
1775 struct i915_frontbuffer_tracking fb_tracking;
1777 struct intel_atomic_helper {
1780 } atomic_helper;
1782 u16 orig_clock;
1784 bool mchbar_need_disable;
1786 struct intel_l3_parity l3_parity;
1789 u32 edram_cap;
1797 struct mutex pcu_lock;
1800 struct intel_gen6_power_mgmt gt_pm;
1804 struct intel_ilk_power_mgmt ips;
1806 struct i915_power_domains power_domains;
1808 struct i915_psr psr;
1810 struct i915_gpu_error gpu_error;
1812 struct drm_i915_gem_object *vlv_pctx;
1815 struct intel_fbdev *fbdev;
1816 struct work_struct fbdev_suspend_work;
1818 struct drm_property *broadcast_rgb_property;
1819 struct drm_property *force_audio_property;
1822 struct i915_audio_component *audio_component;
1823 bool audio_component_registered;
1828 struct mutex av_mutex;
1830 struct {
1843 } contexts;
1845 u32 fdi_rx_config;
1848 u32 chv_phy_control;
1854 u32 chv_dpll_md[I915_MAX_PIPES];
1855 u32 bxt_phy_grc;
1857 u32 suspend_count;
1858 bool power_domains_suspended;
1859 struct i915_suspend_saved_registers regfile;
1860 struct vlv_s0ix_state vlv_s0ix_state;
1862 enum {
1867 } sagv_status;
1869 struct {
1911 } wm;
1913 struct i915_runtime_pm runtime_pm;
1915 struct {
2058 void (*resume)(struct drm_i915_private *); argument
2102 } gt;
2126 static inline struct drm_i915_private *to_i915(const struct drm_device *dev) in to_i915() argument