Lines Matching refs:I915_READ
669 I915_READ(GEN8_DE_PIPE_IMR(pipe))); in gen8_display_interrupt_info()
672 I915_READ(GEN8_DE_PIPE_IIR(pipe))); in gen8_display_interrupt_info()
675 I915_READ(GEN8_DE_PIPE_IER(pipe))); in gen8_display_interrupt_info()
681 I915_READ(GEN8_DE_PORT_IMR)); in gen8_display_interrupt_info()
683 I915_READ(GEN8_DE_PORT_IIR)); in gen8_display_interrupt_info()
685 I915_READ(GEN8_DE_PORT_IER)); in gen8_display_interrupt_info()
688 I915_READ(GEN8_DE_MISC_IMR)); in gen8_display_interrupt_info()
690 I915_READ(GEN8_DE_MISC_IIR)); in gen8_display_interrupt_info()
692 I915_READ(GEN8_DE_MISC_IER)); in gen8_display_interrupt_info()
695 I915_READ(GEN8_PCU_IMR)); in gen8_display_interrupt_info()
697 I915_READ(GEN8_PCU_IIR)); in gen8_display_interrupt_info()
699 I915_READ(GEN8_PCU_IER)); in gen8_display_interrupt_info()
713 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
716 I915_READ(VLV_IER)); in i915_interrupt_info()
718 I915_READ(VLV_IIR)); in i915_interrupt_info()
720 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
722 I915_READ(VLV_IMR)); in i915_interrupt_info()
736 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
743 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
745 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
747 I915_READ(DPINVGTT)); in i915_interrupt_info()
752 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
754 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
756 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
760 I915_READ(GEN8_PCU_IMR)); in i915_interrupt_info()
762 I915_READ(GEN8_PCU_IIR)); in i915_interrupt_info()
764 I915_READ(GEN8_PCU_IER)); in i915_interrupt_info()
767 I915_READ(GEN11_GFX_MSTR_IRQ)); in i915_interrupt_info()
770 I915_READ(GEN11_RENDER_COPY_INTR_ENABLE)); in i915_interrupt_info()
772 I915_READ(GEN11_VCS_VECS_INTR_ENABLE)); in i915_interrupt_info()
774 I915_READ(GEN11_GUC_SG_INTR_ENABLE)); in i915_interrupt_info()
776 I915_READ(GEN11_GPM_WGBOXPERF_INTR_ENABLE)); in i915_interrupt_info()
778 I915_READ(GEN11_CRYPTO_RSVD_INTR_ENABLE)); in i915_interrupt_info()
780 I915_READ(GEN11_GUNIT_CSME_INTR_ENABLE)); in i915_interrupt_info()
783 I915_READ(GEN11_DISPLAY_INT_CTL)); in i915_interrupt_info()
788 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
792 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
794 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
796 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
802 I915_READ(VLV_IER)); in i915_interrupt_info()
804 I915_READ(VLV_IIR)); in i915_interrupt_info()
806 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
808 I915_READ(VLV_IMR)); in i915_interrupt_info()
822 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
827 I915_READ(VLV_MASTER_IER)); in i915_interrupt_info()
830 I915_READ(GTIER)); in i915_interrupt_info()
832 I915_READ(GTIIR)); in i915_interrupt_info()
834 I915_READ(GTIMR)); in i915_interrupt_info()
837 I915_READ(GEN6_PMIER)); in i915_interrupt_info()
839 I915_READ(GEN6_PMIIR)); in i915_interrupt_info()
841 I915_READ(GEN6_PMIMR)); in i915_interrupt_info()
844 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
846 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
848 I915_READ(DPINVGTT)); in i915_interrupt_info()
852 I915_READ(IER)); in i915_interrupt_info()
854 I915_READ(IIR)); in i915_interrupt_info()
856 I915_READ(IMR)); in i915_interrupt_info()
860 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
863 I915_READ(DEIER)); in i915_interrupt_info()
865 I915_READ(DEIIR)); in i915_interrupt_info()
867 I915_READ(DEIMR)); in i915_interrupt_info()
869 I915_READ(SDEIER)); in i915_interrupt_info()
871 I915_READ(SDEIIR)); in i915_interrupt_info()
873 I915_READ(SDEIMR)); in i915_interrupt_info()
875 I915_READ(GTIER)); in i915_interrupt_info()
877 I915_READ(GTIIR)); in i915_interrupt_info()
879 I915_READ(GTIMR)); in i915_interrupt_info()
884 I915_READ(GEN11_RCS0_RSVD_INTR_MASK)); in i915_interrupt_info()
886 I915_READ(GEN11_BCS_RSVD_INTR_MASK)); in i915_interrupt_info()
888 I915_READ(GEN11_VCS0_VCS1_INTR_MASK)); in i915_interrupt_info()
890 I915_READ(GEN11_VCS2_VCS3_INTR_MASK)); in i915_interrupt_info()
892 I915_READ(GEN11_VECS0_VECS1_INTR_MASK)); in i915_interrupt_info()
894 I915_READ(GEN11_GUC_SG_INTR_MASK)); in i915_interrupt_info()
896 I915_READ(GEN11_GPM_WGBOXPERF_INTR_MASK)); in i915_interrupt_info()
898 I915_READ(GEN11_CRYPTO_RSVD_INTR_MASK)); in i915_interrupt_info()
900 I915_READ(GEN11_GUNIT_CSME_INTR_MASK)); in i915_interrupt_info()
1082 rpmodectl = I915_READ(GEN6_RP_CONTROL); in i915_frequency_info()
1125 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); in i915_frequency_info()
1127 rp_state_cap = I915_READ(BXT_RP_STATE_CAP); in i915_frequency_info()
1128 gt_perf_status = I915_READ(BXT_GT_PERF_STATUS); in i915_frequency_info()
1130 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); in i915_frequency_info()
1131 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); in i915_frequency_info()
1137 reqf = I915_READ(GEN6_RPNSWREQ); in i915_frequency_info()
1149 rpmodectl = I915_READ(GEN6_RP_CONTROL); in i915_frequency_info()
1150 rpinclimit = I915_READ(GEN6_RP_UP_THRESHOLD); in i915_frequency_info()
1151 rpdeclimit = I915_READ(GEN6_RP_DOWN_THRESHOLD); in i915_frequency_info()
1153 rpstat = I915_READ(GEN6_RPSTAT1); in i915_frequency_info()
1154 rpupei = I915_READ(GEN6_RP_CUR_UP_EI) & GEN6_CURICONT_MASK; in i915_frequency_info()
1155 rpcurup = I915_READ(GEN6_RP_CUR_UP) & GEN6_CURBSYTAVG_MASK; in i915_frequency_info()
1156 rpprevup = I915_READ(GEN6_RP_PREV_UP) & GEN6_CURBSYTAVG_MASK; in i915_frequency_info()
1157 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK; in i915_frequency_info()
1158 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK; in i915_frequency_info()
1159 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK; in i915_frequency_info()
1166 pm_ier = I915_READ(GEN11_GPM_WGBOXPERF_INTR_ENABLE); in i915_frequency_info()
1167 pm_imr = I915_READ(GEN11_GPM_WGBOXPERF_INTR_MASK); in i915_frequency_info()
1175 pm_ier = I915_READ(GEN8_GT_IER(2)); in i915_frequency_info()
1176 pm_imr = I915_READ(GEN8_GT_IMR(2)); in i915_frequency_info()
1177 pm_isr = I915_READ(GEN8_GT_ISR(2)); in i915_frequency_info()
1178 pm_iir = I915_READ(GEN8_GT_IIR(2)); in i915_frequency_info()
1180 pm_ier = I915_READ(GEN6_PMIER); in i915_frequency_info()
1181 pm_imr = I915_READ(GEN6_PMIMR); in i915_frequency_info()
1182 pm_isr = I915_READ(GEN6_PMISR); in i915_frequency_info()
1183 pm_iir = I915_READ(GEN6_PMIIR); in i915_frequency_info()
1185 pm_mask = I915_READ(GEN6_PMINTRMSK); in i915_frequency_info()
1427 rgvmodectl = I915_READ(MEMMODECTL); in ironlake_drpc_info()
1428 rstdbyctl = I915_READ(RSTDBYCTL); in ironlake_drpc_info()
1502 title, I915_READ(reg), in print_rc6_res()
1511 pw_status = I915_READ(VLV_GTLC_PW_STATUS); in vlv_drpc_info()
1512 rcctl1 = I915_READ(GEN6_RC_CONTROL); in vlv_drpc_info()
1537 rcctl1 = I915_READ(GEN6_RC_CONTROL); in gen6_drpc_info()
1539 gen9_powergate_enable = I915_READ(GEN9_PG_ENABLE); in gen6_drpc_info()
1540 gen9_powergate_status = I915_READ(GEN9_PWRGT_DOMAIN_STATUS); in gen6_drpc_info()
1668 mask = I915_READ(IVB_FBC_STATUS2) & BDW_FBC_COMP_SEG_MASK; in i915_fbc_status()
1670 mask = I915_READ(IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK; in i915_fbc_status()
1672 mask = I915_READ(ILK_DPFC_STATUS) & ILK_DPFC_COMP_SEG_MASK; in i915_fbc_status()
1674 mask = I915_READ(DPFC_STATUS) & DPFC_COMP_SEG_MASK; in i915_fbc_status()
1676 mask = I915_READ(FBC_STATUS) & (FBC_STAT_COMPRESSING | in i915_fbc_status()
1710 reg = I915_READ(ILK_DPFC_CONTROL); in i915_fbc_false_color_set()
1740 if (I915_READ(IPS_CTL) & IPS_ENABLE) in i915_ips_status()
1762 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; in i915_sr_status()
1765 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in i915_sr_status()
1767 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; in i915_sr_status()
1769 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; in i915_sr_status()
1771 sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; in i915_sr_status()
2032 I915_READ(DCC)); in i915_swizzle_info()
2034 I915_READ(DCC2)); in i915_swizzle_info()
2041 I915_READ(MAD_DIMM_C0)); in i915_swizzle_info()
2043 I915_READ(MAD_DIMM_C1)); in i915_swizzle_info()
2045 I915_READ(MAD_DIMM_C2)); in i915_swizzle_info()
2047 I915_READ(TILECTL)); in i915_swizzle_info()
2050 I915_READ(GAMTARBMODE)); in i915_swizzle_info()
2053 I915_READ(ARB_MODE)); in i915_swizzle_info()
2055 I915_READ(DISP_ARB_CTL)); in i915_swizzle_info()
2101 u64 pdp = I915_READ(GEN8_RING_PDP_UDW(engine, i)); in gen8_ppgtt_info()
2103 pdp |= I915_READ(GEN8_RING_PDP_LDW(engine, i)); in gen8_ppgtt_info()
2116 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); in gen6_ppgtt_info()
2122 I915_READ(RING_MODE_GEN7(engine))); in gen6_ppgtt_info()
2124 I915_READ(RING_PP_DIR_BASE(engine))); in gen6_ppgtt_info()
2126 I915_READ(RING_PP_DIR_BASE_READ(engine))); in gen6_ppgtt_info()
2128 I915_READ(RING_PP_DIR_DCLV(engine))); in gen6_ppgtt_info()
2139 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); in gen6_ppgtt_info()
2305 seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2)); in i915_huc_load_status_info()
2325 tmp = I915_READ(GUC_STATUS); in i915_guc_load_status_info()
2336 seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i))); in i915_guc_load_status_info()
2661 psr_status = I915_READ(EDP_PSR2_STATUS); in psr_source_status()
2680 psr_status = I915_READ(EDP_PSR_STATUS); in psr_source_status()
2716 enabled = I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE; in i915_edp_psr_status()
2718 enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE; in i915_edp_psr_status()
2729 psrperf = I915_READ(EDP_PSR_PERF_CNT) & in i915_edp_psr_status()
2799 power = I915_READ(MCH_SECP_NRG_STTS); in i915_energy_uJ()
2886 I915_READ(SKL_CSR_DC3_DC5_COUNT)); in i915_dmc_info()
2888 I915_READ(SKL_CSR_DC5_DC6_COUNT)); in i915_dmc_info()
2891 I915_READ(BXT_CSR_DC3_DC5_COUNT)); in i915_dmc_info()
2895 seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); in i915_dmc_info()
2896 seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); in i915_dmc_info()
2897 seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); in i915_dmc_info()
4201 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_get()
4226 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_set()
4247 sig1[0] = I915_READ(CHV_POWER_SS0_SIG1); in cherryview_sseu_device_status()
4248 sig1[1] = I915_READ(CHV_POWER_SS1_SIG1); in cherryview_sseu_device_status()
4249 sig2[0] = I915_READ(CHV_POWER_SS0_SIG2); in cherryview_sseu_device_status()
4250 sig2[1] = I915_READ(CHV_POWER_SS1_SIG2); in cherryview_sseu_device_status()
4287 s_reg[s] = I915_READ(GEN10_SLICE_PGCTL_ACK(s)) & in gen10_sseu_device_status()
4289 eu_reg[2 * s] = I915_READ(GEN10_SS01_EU_PGCTL_ACK(s)); in gen10_sseu_device_status()
4290 eu_reg[2 * s + 1] = I915_READ(GEN10_SS23_EU_PGCTL_ACK(s)); in gen10_sseu_device_status()
4337 s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s)); in gen9_sseu_device_status()
4338 eu_reg[2*s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); in gen9_sseu_device_status()
4339 eu_reg[2*s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); in gen9_sseu_device_status()
4387 u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO); in broadwell_sseu_device_status()