Lines Matching refs:indirect_ctx
328 if (!wa_ctx->indirect_ctx.obj) in release_shadow_wa_ctx()
331 i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
332 i915_gem_object_put(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
384 (workload->wa_ctx.indirect_ctx.size != 0)) { in intel_gvt_scan_and_shadow_workload()
505 (~INDIRECT_CTX_ADDR_MASK)) | wa_ctx->indirect_ctx.shadow_gma; in update_wa_ctx_2_shadow_ctx()
512 (unsigned char *)wa_ctx->indirect_ctx.shadow_va + in prepare_shadow_wa_ctx()
513 wa_ctx->indirect_ctx.size; in prepare_shadow_wa_ctx()
515 if (wa_ctx->indirect_ctx.size == 0) in prepare_shadow_wa_ctx()
518 vma = i915_gem_object_ggtt_pin(wa_ctx->indirect_ctx.obj, NULL, in prepare_shadow_wa_ctx()
528 wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma); in prepare_shadow_wa_ctx()
1304 u32 head, tail, start, ctl, ctx_ctl, per_ctx, indirect_ctx; in intel_vgpu_create_workload() local
1360 RING_CTX_OFF(rcs_indirect_ctx.val), &indirect_ctx, 4); in intel_vgpu_create_workload()
1362 workload->wa_ctx.indirect_ctx.guest_gma = in intel_vgpu_create_workload()
1363 indirect_ctx & INDIRECT_CTX_ADDR_MASK; in intel_vgpu_create_workload()
1364 workload->wa_ctx.indirect_ctx.size = in intel_vgpu_create_workload()
1365 (indirect_ctx & INDIRECT_CTX_SIZE_MASK) * in intel_vgpu_create_workload()