Lines Matching refs:D_BDW_PLUS
1828 MMIO_DH(GEN8_GAMW_ECO_DEV_RW_IA, D_BDW_PLUS, NULL, in init_generic_mmio_info()
1846 MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, mmio_read_from_hw, NULL); in init_generic_mmio_info()
2570 MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2576 MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL); in init_generic_mmio_info()
2577 MMIO_D(_MMIO(0x2b00), D_BDW_PLUS); in init_generic_mmio_info()
2578 MMIO_D(_MMIO(0x2360), D_BDW_PLUS); in init_generic_mmio_info()
2583 MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2584 MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2598 MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2599 MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2600 MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2601 MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2602 MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2603 MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2612 MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2613 MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2614 MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2615 MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2624 MMIO_DH(GEN8_GT_IMR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2625 MMIO_DH(GEN8_GT_IER(0), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2626 MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2627 MMIO_D(GEN8_GT_ISR(0), D_BDW_PLUS); in init_broadwell_mmio_info()
2629 MMIO_DH(GEN8_GT_IMR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2630 MMIO_DH(GEN8_GT_IER(1), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2631 MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2632 MMIO_D(GEN8_GT_ISR(1), D_BDW_PLUS); in init_broadwell_mmio_info()
2634 MMIO_DH(GEN8_GT_IMR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2635 MMIO_DH(GEN8_GT_IER(2), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2636 MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2637 MMIO_D(GEN8_GT_ISR(2), D_BDW_PLUS); in init_broadwell_mmio_info()
2639 MMIO_DH(GEN8_GT_IMR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2640 MMIO_DH(GEN8_GT_IER(3), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2641 MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2642 MMIO_D(GEN8_GT_ISR(3), D_BDW_PLUS); in init_broadwell_mmio_info()
2644 MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_A), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2646 MMIO_DH(GEN8_DE_PIPE_IER(PIPE_A), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2648 MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_A), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2650 MMIO_D(GEN8_DE_PIPE_ISR(PIPE_A), D_BDW_PLUS); in init_broadwell_mmio_info()
2652 MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_B), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2654 MMIO_DH(GEN8_DE_PIPE_IER(PIPE_B), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2656 MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_B), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2658 MMIO_D(GEN8_DE_PIPE_ISR(PIPE_B), D_BDW_PLUS); in init_broadwell_mmio_info()
2660 MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_C), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2662 MMIO_DH(GEN8_DE_PIPE_IER(PIPE_C), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2664 MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_C), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2666 MMIO_D(GEN8_DE_PIPE_ISR(PIPE_C), D_BDW_PLUS); in init_broadwell_mmio_info()
2668 MMIO_DH(GEN8_DE_PORT_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2669 MMIO_DH(GEN8_DE_PORT_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2670 MMIO_DH(GEN8_DE_PORT_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2671 MMIO_D(GEN8_DE_PORT_ISR, D_BDW_PLUS); in init_broadwell_mmio_info()
2673 MMIO_DH(GEN8_DE_MISC_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2674 MMIO_DH(GEN8_DE_MISC_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2675 MMIO_DH(GEN8_DE_MISC_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2676 MMIO_D(GEN8_DE_MISC_ISR, D_BDW_PLUS); in init_broadwell_mmio_info()
2678 MMIO_DH(GEN8_PCU_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); in init_broadwell_mmio_info()
2679 MMIO_DH(GEN8_PCU_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); in init_broadwell_mmio_info()
2680 MMIO_DH(GEN8_PCU_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_broadwell_mmio_info()
2681 MMIO_D(GEN8_PCU_ISR, D_BDW_PLUS); in init_broadwell_mmio_info()
2683 MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2686 MMIO_RING_DFH(RING_ACTHD_UDW, D_BDW_PLUS, F_CMD_ACCESS, in init_broadwell_mmio_info()
2691 ~_MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET), D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
2696 MMIO_RING_DFH(RING_REG, D_BDW_PLUS, 0, NULL, elsp_mmio_write); in init_broadwell_mmio_info()
2700 MMIO_RING_F(RING_REG, 8, F_RO | F_CMD_ACCESS, 0, ~0, D_BDW_PLUS, in init_broadwell_mmio_info()
2705 MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2709 MMIO_RING_F(RING_REG, 48, F_RO, 0, ~0, D_BDW_PLUS, NULL, NULL); in init_broadwell_mmio_info()
2713 MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_MODE_MASK, NULL, NULL); in init_broadwell_mmio_info()
2716 MMIO_D(PIPEMISC(PIPE_A), D_BDW_PLUS); in init_broadwell_mmio_info()
2717 MMIO_D(PIPEMISC(PIPE_B), D_BDW_PLUS); in init_broadwell_mmio_info()
2718 MMIO_D(PIPEMISC(PIPE_C), D_BDW_PLUS); in init_broadwell_mmio_info()
2719 MMIO_D(_MMIO(0x1c1d0), D_BDW_PLUS); in init_broadwell_mmio_info()
2720 MMIO_D(GEN6_MBCUNIT_SNPCR, D_BDW_PLUS); in init_broadwell_mmio_info()
2721 MMIO_D(GEN7_MISCCPCTL, D_BDW_PLUS); in init_broadwell_mmio_info()
2722 MMIO_D(_MMIO(0x1c054), D_BDW_PLUS); in init_broadwell_mmio_info()
2724 MMIO_DH(GEN6_PCODE_MAILBOX, D_BDW_PLUS, NULL, mailbox_write); in init_broadwell_mmio_info()
2726 MMIO_D(GEN8_PRIVATE_PAT_LO, D_BDW_PLUS); in init_broadwell_mmio_info()
2727 MMIO_D(GEN8_PRIVATE_PAT_HI, D_BDW_PLUS); in init_broadwell_mmio_info()
2729 MMIO_D(GAMTARBMODE, D_BDW_PLUS); in init_broadwell_mmio_info()
2732 MMIO_RING_F(RING_REG, 32, 0, 0, 0, D_BDW_PLUS, NULL, NULL); in init_broadwell_mmio_info()
2735 MMIO_RING_GM_RDR(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write); in init_broadwell_mmio_info()
2737 MMIO_DFH(HDC_CHICKEN0, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2739 MMIO_D(CHICKEN_PIPESL_1(PIPE_A), D_BDW_PLUS); in init_broadwell_mmio_info()
2740 MMIO_D(CHICKEN_PIPESL_1(PIPE_B), D_BDW_PLUS); in init_broadwell_mmio_info()
2741 MMIO_D(CHICKEN_PIPESL_1(PIPE_C), D_BDW_PLUS); in init_broadwell_mmio_info()
2746 MMIO_D(_MMIO(0x6671c), D_BDW_PLUS); in init_broadwell_mmio_info()
2747 MMIO_D(_MMIO(0x66c00), D_BDW_PLUS); in init_broadwell_mmio_info()
2748 MMIO_D(_MMIO(0x66c04), D_BDW_PLUS); in init_broadwell_mmio_info()
2750 MMIO_D(HSW_GTT_CACHE_EN, D_BDW_PLUS); in init_broadwell_mmio_info()
2752 MMIO_D(GEN8_EU_DISABLE0, D_BDW_PLUS); in init_broadwell_mmio_info()
2753 MMIO_D(GEN8_EU_DISABLE1, D_BDW_PLUS); in init_broadwell_mmio_info()
2754 MMIO_D(GEN8_EU_DISABLE2, D_BDW_PLUS); in init_broadwell_mmio_info()
2756 MMIO_D(_MMIO(0xfdc), D_BDW_PLUS); in init_broadwell_mmio_info()
2757 MMIO_DFH(GEN8_ROW_CHICKEN, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, in init_broadwell_mmio_info()
2759 MMIO_DFH(GEN7_ROW_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, in init_broadwell_mmio_info()
2761 MMIO_DFH(GEN8_UCGCTL6, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2765 MMIO_DFH(GEN8_L3SQCREG4, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2770 MMIO_F(_MMIO(0x24d0), 48, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, in init_broadwell_mmio_info()
2773 MMIO_D(_MMIO(0x44484), D_BDW_PLUS); in init_broadwell_mmio_info()
2774 MMIO_D(_MMIO(0x4448c), D_BDW_PLUS); in init_broadwell_mmio_info()
2777 MMIO_D(GEN8_L3_LRA_1_GPGPU, D_BDW_PLUS); in init_broadwell_mmio_info()
2781 MMIO_D(_MMIO(0x110000), D_BDW_PLUS); in init_broadwell_mmio_info()
2783 MMIO_D(_MMIO(0x48400), D_BDW_PLUS); in init_broadwell_mmio_info()
2785 MMIO_D(_MMIO(0x6e570), D_BDW_PLUS); in init_broadwell_mmio_info()
2786 MMIO_D(_MMIO(0x65f10), D_BDW_PLUS); in init_broadwell_mmio_info()
2788 MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2789 MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2790 MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2791 MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2795 MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2796 MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2797 MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2798 MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2799 MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2800 MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2801 MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2802 MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()
2803 MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_broadwell_mmio_info()