682 static inline u32 cmd_val(struct parser_exec_state *s, int index)  in cmd_val()  function
709 			s->ip_va, cmd_val(s, 0), cmd_val(s, 1),  in parser_exec_state_dump()
710 			cmd_val(s, 2), cmd_val(s, 3));  in parser_exec_state_dump()
712 	print_opcode(cmd_val(s, 0), s->ring_id);  in parser_exec_state_dump()
719 			gvt_dbg_cmd("%08x ", cmd_val(s, i));  in parser_exec_state_dump()
790 	return get_cmd_length(s->info, cmd_val(s, 0));  in cmd_length()
826 		data = cmd_val(s, index + 1);  in force_nonpriv_reg_handler()
857 	vgpu_vreg(s->vgpu, offset) = cmd_val(s, index + 1);  in mocs_cmd_reg_handler()
911 			u32 data = cmd_val(s, index + 1);  in cmd_reg_handler()
927 	(cmd_val(s, i) & GENMASK(22, 2))
930 	(cmd_val(s, i) & GENMASK(22, 18))
933 	(cmd_val(s, i) & GENMASK(31, 2))
936 	(cmd_val(s, i) & GENMASK(15, 0))
1005 		if (cmd_val(s, 0) & (1 << 22)) {  in cmd_handler_lrm()
1029 		if (cmd_val(s, 0) & (1 << 22)) {  in cmd_handler_srm()
1084 	post_sync = (cmd_val(s, 1) & PIPE_CONTROL_POST_SYNC_OP_MASK) >> 14;  in cmd_handler_pipe_control()
1087 	if (cmd_val(s, 1) & PIPE_CONTROL_MMIO_WRITE)  in cmd_handler_pipe_control()
1097 			if ((cmd_val(s, 1) & PIPE_CONTROL_GLOBAL_GTT_IVB)) {  in cmd_handler_pipe_control()
1098 				gma = cmd_val(s, 2) & GENMASK(31, 3);  in cmd_handler_pipe_control()
1102 				if (cmd_val(s, 1) & (1 << 21))  in cmd_handler_pipe_control()
1113 	if (cmd_val(s, 1) & PIPE_CONTROL_NOTIFY)  in cmd_handler_pipe_control()
1184 	dword0 = cmd_val(s, 0);  in gen8_decode_mi_display_flip()
1185 	dword1 = cmd_val(s, 1);  in gen8_decode_mi_display_flip()
1186 	dword2 = cmd_val(s, 2);  in gen8_decode_mi_display_flip()
1220 	u32 dword0 = cmd_val(s, 0);  in skl_decode_mi_display_flip()
1221 	u32 dword1 = cmd_val(s, 1);  in skl_decode_mi_display_flip()
1222 	u32 dword2 = cmd_val(s, 2);  in skl_decode_mi_display_flip()
1403 	u32 cmd = cmd_val(s, 0);  in cmd_handler_mi_wait_for_event()
1424 	gma_low = cmd_val(s, index) & BATCH_BUFFER_ADDR_MASK;  in get_gma_bb_from_cmd()
1428 		gma_high = cmd_val(s, index + 1) & BATCH_BUFFER_ADDR_HIGH_MASK;  in get_gma_bb_from_cmd()
1467 			pr_err("\n%08x ", cmd_val(s, i));  in cmd_address_audit()
1469 			pr_err("%08x ", cmd_val(s, i));  in cmd_address_audit()
1484 	int core_id = (cmd_val(s, 2) & (1 << 0)) ? 1 : 0;  in cmd_handler_mi_store_data_imm()
1489 	if (!(cmd_val(s, 0) & (1 << 22)))  in cmd_handler_mi_store_data_imm()
1492 	gma = cmd_val(s, 2) & GENMASK(31, 2);  in cmd_handler_mi_store_data_imm()
1495 		gma_low = cmd_val(s, 1) & GENMASK(31, 2);  in cmd_handler_mi_store_data_imm()
1496 		gma_high = cmd_val(s, 2) & GENMASK(15, 0);  in cmd_handler_mi_store_data_imm()
1498 		core_id = (cmd_val(s, 1) & (1 << 0)) ? 1 : 0;  in cmd_handler_mi_store_data_imm()
1531 	int op_size = (1 << ((cmd_val(s, 0) & GENMASK(20, 19)) >> 19)) *  in cmd_handler_mi_op_2f()
1536 	if (!(cmd_val(s, 0) & (1 << 22)))  in cmd_handler_mi_op_2f()
1539 	gma = cmd_val(s, 1) & GENMASK(31, 2);  in cmd_handler_mi_op_2f()
1541 		gma_high = cmd_val(s, 2) & GENMASK(15, 0);  in cmd_handler_mi_op_2f()
1577 	if (((cmd_val(s, 0) >> 14) & 0x3) && (cmd_val(s, 1) & (1 << 2))) {  in cmd_handler_mi_flush_dw()
1578 		gma = cmd_val(s, 1) & GENMASK(31, 3);  in cmd_handler_mi_flush_dw()
1580 			gma |= (cmd_val(s, 2) & GENMASK(15, 0)) << 32;  in cmd_handler_mi_flush_dw()
1582 		if (cmd_val(s, 0) & (1 << 21))  in cmd_handler_mi_flush_dw()
1587 	if ((cmd_val(s, 0) & (1 << 8)))  in cmd_handler_mi_flush_dw()
1596 			(BATCH_BUFFER_ADR_SPACE_BIT(cmd_val(s, 0)) == 1)) {  in addr_type_update_snb()
1637 	if (cmd_val(s, 0) & (1 << 8) &&  in batch_buffer_needs_scan()
1661 	cmd = cmd_val(s, 0);  in find_bb_size()
1813 	second_level = BATCH_BUFFER_2ND_LEVEL_BIT(cmd_val(s, 0)) == 1;  in cmd_handler_mi_batch_buffer_start()
2526 	cmd = cmd_val(s, 0);  in cmd_parser_exec()