Lines Matching refs:timing_base
100 unsigned int timing_base; member
119 .timing_base = 0x0,
125 .timing_base = 0x0,
131 .timing_base = 0x20000,
139 .timing_base = 0x0,
148 .timing_base = 0x20000,
159 .timing_base = 0x20000,
424 void __iomem *timing_base = ctx->regs + ctx->driver_data->timing_base; in fimd_setup_trigger() local
426 u32 val = readl(timing_base + TRIGCON); in fimd_setup_trigger()
439 writel(val, timing_base + TRIGCON); in fimd_setup_trigger()
447 void *timing_base = ctx->regs + driver_data->timing_base; in fimd_commit() local
459 writel(val, timing_base + I80IFCONFAx(0)); in fimd_commit()
462 writel(0, timing_base + I80IFCONFBx(0)); in fimd_commit()
483 writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); in fimd_commit()
493 writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); in fimd_commit()
503 writel(val, ctx->regs + driver_data->timing_base + VIDTCON1); in fimd_commit()
507 writel(ctx->vidout_con, timing_base + VIDOUT_CON); in fimd_commit()
535 writel(val, ctx->regs + driver_data->timing_base + VIDTCON2); in fimd_commit()
867 void *timing_base = ctx->regs + driver_data->timing_base; in fimd_trigger() local
880 reg = readl(timing_base + TRIGCON); in fimd_trigger()
882 writel(reg, timing_base + TRIGCON); in fimd_trigger()