49 static inline void ast_load_palette_index(struct ast_private *ast,  in ast_load_palette_index()  argument
53 	ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);  in ast_load_palette_index()
54 	ast_io_read8(ast, AST_IO_SEQ_PORT);  in ast_load_palette_index()
55 	ast_io_write8(ast, AST_IO_DAC_DATA, red);  in ast_load_palette_index()
56 	ast_io_read8(ast, AST_IO_SEQ_PORT);  in ast_load_palette_index()
57 	ast_io_write8(ast, AST_IO_DAC_DATA, green);  in ast_load_palette_index()
58 	ast_io_read8(ast, AST_IO_SEQ_PORT);  in ast_load_palette_index()
59 	ast_io_write8(ast, AST_IO_DAC_DATA, blue);  in ast_load_palette_index()
60 	ast_io_read8(ast, AST_IO_SEQ_PORT);  in ast_load_palette_index()
65 	struct ast_private *ast = crtc->dev->dev_private;  in ast_crtc_load_lut()  local
77 		ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);  in ast_crtc_load_lut()
84 	struct ast_private *ast = crtc->dev->dev_private;  in ast_get_vbios_mode_info()  local
204 	if (ast->chip == AST1180) {  in ast_get_vbios_mode_info()
207 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));  in ast_get_vbios_mode_info()
208 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);  in ast_get_vbios_mode_info()
209 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);  in ast_get_vbios_mode_info()
211 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);  in ast_get_vbios_mode_info()
213 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);  in ast_get_vbios_mode_info()
214 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92,  in ast_get_vbios_mode_info()
216 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);  in ast_get_vbios_mode_info()
217 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);  in ast_get_vbios_mode_info()
218 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);  in ast_get_vbios_mode_info()
220 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);  in ast_get_vbios_mode_info()
221 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);  in ast_get_vbios_mode_info()
232 	struct ast_private *ast = crtc->dev->dev_private;  in ast_set_std_reg()  local
240 	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);  in ast_set_std_reg()
243 	ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);  in ast_set_std_reg()
248 		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);  in ast_set_std_reg()
252 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);  in ast_set_std_reg()
254 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);  in ast_set_std_reg()
257 	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);  in ast_set_std_reg()
260 		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);  in ast_set_std_reg()
261 		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);  in ast_set_std_reg()
263 	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);  in ast_set_std_reg()
264 	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);  in ast_set_std_reg()
266 	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);  in ast_set_std_reg()
267 	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);  in ast_set_std_reg()
271 		ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);  in ast_set_std_reg()
277 	struct ast_private *ast = crtc->dev->dev_private;  in ast_set_crtc_reg()  local
281 	if ((ast->chip == AST2500) &&  in ast_set_crtc_reg()
285 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);  in ast_set_crtc_reg()
290 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);  in ast_set_crtc_reg()
295 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);  in ast_set_crtc_reg()
300 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);  in ast_set_crtc_reg()
307 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));  in ast_set_crtc_reg()
312 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);  in ast_set_crtc_reg()
317 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));  in ast_set_crtc_reg()
319 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);  in ast_set_crtc_reg()
320 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);  in ast_set_crtc_reg()
330 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);  in ast_set_crtc_reg()
339 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);  in ast_set_crtc_reg()
346 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);  in ast_set_crtc_reg()
355 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);  in ast_set_crtc_reg()
364 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);  in ast_set_crtc_reg()
369 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);  in ast_set_crtc_reg()
371 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);  in ast_set_crtc_reg()
372 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);  in ast_set_crtc_reg()
373 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));  in ast_set_crtc_reg()
376 		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);  in ast_set_crtc_reg()
378 		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);  in ast_set_crtc_reg()
380 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);  in ast_set_crtc_reg()
385 	struct ast_private *ast = crtc->dev->dev_private;  in ast_set_offset_reg()  local
391 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));  in ast_set_offset_reg()
392 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);  in ast_set_offset_reg()
398 	struct ast_private *ast = dev->dev_private;  in ast_set_dclk_reg()  local
401 	if (ast->chip == AST2500)  in ast_set_dclk_reg()
406 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);  in ast_set_dclk_reg()
407 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);  in ast_set_dclk_reg()
408 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,  in ast_set_dclk_reg()
416 	struct ast_private *ast = crtc->dev->dev_private;  in ast_set_ext_reg()  local
439 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);  in ast_set_ext_reg()
440 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);  in ast_set_ext_reg()
441 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);  in ast_set_ext_reg()
444 	if (ast->chip == AST2300 || ast->chip == AST2400 ||  in ast_set_ext_reg()
445 	    ast->chip == AST2500) {  in ast_set_ext_reg()
446 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);  in ast_set_ext_reg()
447 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);  in ast_set_ext_reg()
448 	} else if (ast->chip == AST2100 ||  in ast_set_ext_reg()
449 		   ast->chip == AST1100 ||  in ast_set_ext_reg()
450 		   ast->chip == AST2200 ||  in ast_set_ext_reg()
451 		   ast->chip == AST2150) {  in ast_set_ext_reg()
452 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);  in ast_set_ext_reg()
453 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);  in ast_set_ext_reg()
455 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);  in ast_set_ext_reg()
456 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);  in ast_set_ext_reg()
463 	struct ast_private *ast = dev->dev_private;  in ast_set_sync_reg()  local
466 	jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);  in ast_set_sync_reg()
470 	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);  in ast_set_sync_reg()
489 	struct ast_private *ast = crtc->dev->dev_private;  in ast_set_start_address_crt1()  local
493 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));  in ast_set_start_address_crt1()
494 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));  in ast_set_start_address_crt1()
495 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));  in ast_set_start_address_crt1()
501 	struct ast_private *ast = crtc->dev->dev_private;  in ast_crtc_dpms()  local
503 	if (ast->chip == AST1180)  in ast_crtc_dpms()
510 		ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);  in ast_crtc_dpms()
511 		if (ast->tx_chip_type == AST_TX_DP501)  in ast_crtc_dpms()
516 		if (ast->tx_chip_type == AST_TX_DP501)  in ast_crtc_dpms()
518 		ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);  in ast_crtc_dpms()
528 	struct ast_private *ast = crtc->dev->dev_private;  in ast_crtc_do_set_base()  local
561 	if (&ast->fbdev->afb == ast_fb) {  in ast_crtc_do_set_base()
567 			ast_fbdev_set_base(ast, gpu_addr);  in ast_crtc_do_set_base()
589 	struct ast_private *ast = crtc->dev->dev_private;  in ast_crtc_mode_set()  local
592 	if (ast->chip == AST1180) {  in ast_crtc_mode_set()
600 	ast_open_key(ast);  in ast_crtc_mode_set()
602 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);  in ast_crtc_mode_set()
645 	struct ast_private *ast = crtc->dev->dev_private;  in ast_crtc_commit()  local
646 	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);  in ast_crtc_commit()
774 	struct ast_private *ast = connector->dev->dev_private;  in ast_get_modes()  local
778 	if (ast->tx_chip_type == AST_TX_DP501) {  in ast_get_modes()
779 		ast->dp501_maxclk = 0xff;  in ast_get_modes()
786 			ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);  in ast_get_modes()
805 	struct ast_private *ast = connector->dev->dev_private;  in ast_mode_valid()  local
809 	if (ast->support_wide_screen) {  in ast_mode_valid()
821 		if ((ast->chip == AST2100) || (ast->chip == AST2200) ||  in ast_mode_valid()
822 		    (ast->chip == AST2300) || (ast->chip == AST2400) ||  in ast_mode_valid()
823 		    (ast->chip == AST2500) || (ast->chip == AST1180)) {  in ast_mode_valid()
828 				jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);  in ast_mode_valid()
915 	struct ast_private *ast = dev->dev_private;  in ast_cursor_init()  local
938 	ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap);  in ast_cursor_init()
942 	ast->cursor_cache = obj;  in ast_cursor_init()
943 	ast->cursor_cache_gpu_addr = gpu_addr;  in ast_cursor_init()
944 	DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr);  in ast_cursor_init()
952 	struct ast_private *ast = dev->dev_private;  in ast_cursor_fini()  local
953 	ttm_bo_kunmap(&ast->cache_kmap);  in ast_cursor_fini()
954 	drm_gem_object_put_unlocked(ast->cursor_cache);  in ast_cursor_fini()
974 	struct ast_private *ast = i2c->dev->dev_private;  in get_clock()  local
977 	val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4;  in get_clock()
984 	struct ast_private *ast = i2c->dev->dev_private;  in get_data()  local
987 	val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5;  in get_data()
994 	struct ast_private *ast = i2c->dev->dev_private;  in set_clock()  local
1000 		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7);  in set_clock()
1001 		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);  in set_clock()
1010 	struct ast_private *ast = i2c->dev->dev_private;  in set_data()  local
1016 		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7);  in set_data()
1017 		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);  in set_data()
1070 	struct ast_private *ast = crtc->dev->dev_private;  in ast_show_cursor()  local
1076 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);  in ast_show_cursor()
1081 	struct ast_private *ast = crtc->dev->dev_private;  in ast_hide_cursor()  local
1082 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);  in ast_hide_cursor()
1147 	struct ast_private *ast = crtc->dev->dev_private;  in ast_cursor_set()  local
1179 	dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem);  in ast_cursor_set()
1186 	dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;  in ast_cursor_set()
1195 …u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor…  in ast_cursor_set()
1203 		gpu_addr = ast->cursor_cache_gpu_addr;  in ast_cursor_set()
1204 		gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;  in ast_cursor_set()
1206 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);  in ast_cursor_set()
1207 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);  in ast_cursor_set()
1208 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);  in ast_cursor_set()
1215 	ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM;  in ast_cursor_set()
1230 	struct ast_private *ast = crtc->dev->dev_private;  in ast_cursor_move()  local
1234 …sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + A…  in ast_cursor_move()
1249 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);  in ast_cursor_move()
1250 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);  in ast_cursor_move()
1251 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));  in ast_cursor_move()
1252 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));  in ast_cursor_move()
1253 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));  in ast_cursor_move()
1254 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));  in ast_cursor_move()
1257 	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00);  in ast_cursor_move()