175 static int malidp500_query_hw(struct malidp_hw_device *hwdev)  in malidp500_query_hw()  argument
177 	u32 conf = malidp_hw_read(hwdev, MALIDP500_CONFIG_ID);  in malidp500_query_hw()
181 	hwdev->min_line_size = 2;  in malidp500_query_hw()
182 	hwdev->max_line_size = SZ_2K * ln_size_mult;  in malidp500_query_hw()
183 	hwdev->rotation_memory[0] = SZ_1K * 64 * ln_size_mult;  in malidp500_query_hw()
184 	hwdev->rotation_memory[1] = 0; /* no second rotation memory bank */  in malidp500_query_hw()
189 static void malidp500_enter_config_mode(struct malidp_hw_device *hwdev)  in malidp500_enter_config_mode()  argument
193 	malidp_hw_setbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL);  in malidp500_enter_config_mode()
195 		status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp500_enter_config_mode()
208 static void malidp500_leave_config_mode(struct malidp_hw_device *hwdev)  in malidp500_leave_config_mode()  argument
212 	malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID);  in malidp500_leave_config_mode()
213 	malidp_hw_clearbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL);  in malidp500_leave_config_mode()
215 		status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp500_leave_config_mode()
224 static bool malidp500_in_config_mode(struct malidp_hw_device *hwdev)  in malidp500_in_config_mode()  argument
228 	status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp500_in_config_mode()
235 static void malidp500_set_config_valid(struct malidp_hw_device *hwdev, u8 value)  in malidp500_set_config_valid()  argument
238 		malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID);  in malidp500_set_config_valid()
240 		malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID);  in malidp500_set_config_valid()
243 static void malidp500_modeset(struct malidp_hw_device *hwdev, struct videomode *mode)  in malidp500_modeset()  argument
247 	malidp_hw_write(hwdev, hwdev->output_color_depth,  in malidp500_modeset()
248 		hwdev->hw->map.out_depth_base);  in malidp500_modeset()
249 	malidp_hw_clearbits(hwdev, MALIDP500_DC_CLEAR_MASK, MALIDP500_DC_CONTROL);  in malidp500_modeset()
255 	malidp_hw_setbits(hwdev, val, MALIDP500_DC_CONTROL);  in malidp500_modeset()
265 	malidp_hw_write(hwdev, val, MALIDP500_BGND_COLOR);  in malidp500_modeset()
266 	malidp_hw_write(hwdev, MALIDP_BGND_COLOR_B, MALIDP500_BGND_COLOR + 4);  in malidp500_modeset()
270 	malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_H_TIMINGS);  in malidp500_modeset()
274 	malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_V_TIMINGS);  in malidp500_modeset()
278 	malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH);  in malidp500_modeset()
281 	malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE);  in malidp500_modeset()
284 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);  in malidp500_modeset()
286 		malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);  in malidp500_modeset()
289 static int malidp500_rotmem_required(struct malidp_hw_device *hwdev, u16 w, u16 h, u32 fmt)  in malidp500_rotmem_required()  argument
303 static void malidp500_se_write_pp_coefftab(struct malidp_hw_device *hwdev,  in malidp500_se_write_pp_coefftab()  argument
311 	malidp_hw_write(hwdev,  in malidp500_se_write_pp_coefftab()
315 		malidp_hw_write(hwdev, MALIDP_SE_SET_COEFFTAB_DATA(  in malidp500_se_write_pp_coefftab()
320 static int malidp500_se_set_scaling_coeffs(struct malidp_hw_device *hwdev,  in malidp500_se_set_scaling_coeffs()  argument
334 		malidp500_se_write_pp_coefftab(hwdev,  in malidp500_se_set_scaling_coeffs()
340 			malidp500_se_write_pp_coefftab(hwdev,  in malidp500_se_set_scaling_coeffs()
344 			malidp500_se_write_pp_coefftab(hwdev,  in malidp500_se_set_scaling_coeffs()
352 static long malidp500_se_calc_mclk(struct malidp_hw_device *hwdev,  in malidp500_se_calc_mclk()  argument
376 	ret = clk_get_rate(hwdev->mclk);  in malidp500_se_calc_mclk()
385 static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev,  in malidp500_enable_memwrite()  argument
391 	u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);  in malidp500_enable_memwrite()
394 	malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC);  in malidp500_enable_memwrite()
397 	if (hwdev->mw_state != MW_NOT_ENABLED)  in malidp500_enable_memwrite()
398 		hwdev->mw_state = MW_RESTART;  in malidp500_enable_memwrite()
400 		hwdev->mw_state = MW_START;  in malidp500_enable_memwrite()
402 	malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT);  in malidp500_enable_memwrite()
405 		malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);  in malidp500_enable_memwrite()
406 		malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);  in malidp500_enable_memwrite()
407 		malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);  in malidp500_enable_memwrite()
410 		malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);  in malidp500_enable_memwrite()
411 		malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);  in malidp500_enable_memwrite()
412 		malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE);  in malidp500_enable_memwrite()
418 	malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h),  in malidp500_enable_memwrite()
425 			malidp_hw_write(hwdev, rgb2yuv_coeffs[i],  in malidp500_enable_memwrite()
430 	malidp_hw_setbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL);  in malidp500_enable_memwrite()
435 static void malidp500_disable_memwrite(struct malidp_hw_device *hwdev)  in malidp500_disable_memwrite()  argument
437 	u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);  in malidp500_disable_memwrite()
439 	if (hwdev->mw_state == MW_START || hwdev->mw_state == MW_RESTART)  in malidp500_disable_memwrite()
440 		hwdev->mw_state = MW_STOP;  in malidp500_disable_memwrite()
441 	malidp_hw_clearbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL);  in malidp500_disable_memwrite()
442 	malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC);  in malidp500_disable_memwrite()
445 static int malidp550_query_hw(struct malidp_hw_device *hwdev)  in malidp550_query_hw()  argument
447 	u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID);  in malidp550_query_hw()
450 	hwdev->min_line_size = 2;  in malidp550_query_hw()
454 		hwdev->max_line_size = SZ_2K;  in malidp550_query_hw()
459 		hwdev->max_line_size = SZ_4K;  in malidp550_query_hw()
464 		hwdev->max_line_size = 1280;  in malidp550_query_hw()
470 		hwdev->max_line_size = 0;  in malidp550_query_hw()
474 	hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K;  in malidp550_query_hw()
478 static void malidp550_enter_config_mode(struct malidp_hw_device *hwdev)  in malidp550_enter_config_mode()  argument
482 	malidp_hw_setbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL);  in malidp550_enter_config_mode()
484 		status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp550_enter_config_mode()
497 static void malidp550_leave_config_mode(struct malidp_hw_device *hwdev)  in malidp550_leave_config_mode()  argument
501 	malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID);  in malidp550_leave_config_mode()
502 	malidp_hw_clearbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL);  in malidp550_leave_config_mode()
504 		status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp550_leave_config_mode()
513 static bool malidp550_in_config_mode(struct malidp_hw_device *hwdev)  in malidp550_in_config_mode()  argument
517 	status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS);  in malidp550_in_config_mode()
524 static void malidp550_set_config_valid(struct malidp_hw_device *hwdev, u8 value)  in malidp550_set_config_valid()  argument
527 		malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID);  in malidp550_set_config_valid()
529 		malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID);  in malidp550_set_config_valid()
532 static void malidp550_modeset(struct malidp_hw_device *hwdev, struct videomode *mode)  in malidp550_modeset()  argument
536 	malidp_hw_write(hwdev, hwdev->output_color_depth,  in malidp550_modeset()
537 		hwdev->hw->map.out_depth_base);  in malidp550_modeset()
538 	malidp_hw_write(hwdev, val, MALIDP550_DE_CONTROL);  in malidp550_modeset()
551 	malidp_hw_write(hwdev, val, MALIDP550_DE_BGND_COLOR);  in malidp550_modeset()
555 	malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_H_TIMINGS);  in malidp550_modeset()
559 	malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_V_TIMINGS);  in malidp550_modeset()
567 	malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH);  in malidp550_modeset()
570 	malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE);  in malidp550_modeset()
573 		malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);  in malidp550_modeset()
575 		malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC);  in malidp550_modeset()
578 static int malidp550_rotmem_required(struct malidp_hw_device *hwdev, u16 w, u16 h, u32 fmt)  in malidp550_rotmem_required()  argument
623 static int malidp550_se_set_scaling_coeffs(struct malidp_hw_device *hwdev,  in malidp550_se_set_scaling_coeffs()  argument
632 	malidp_hw_clearbits(hwdev, mask, MALIDP550_SE_CONTROL);  in malidp550_se_set_scaling_coeffs()
633 	malidp_hw_setbits(hwdev, new_value, MALIDP550_SE_CONTROL);  in malidp550_se_set_scaling_coeffs()
637 static long malidp550_se_calc_mclk(struct malidp_hw_device *hwdev,  in malidp550_se_calc_mclk()  argument
661 	ret = clk_get_rate(hwdev->mclk);  in malidp550_se_calc_mclk()
670 static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev,  in malidp550_enable_memwrite()  argument
676 	u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);  in malidp550_enable_memwrite()
679 	malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC);  in malidp550_enable_memwrite()
681 	hwdev->mw_state = MW_ONESHOT;  in malidp550_enable_memwrite()
683 	malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT);  in malidp550_enable_memwrite()
686 		malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);  in malidp550_enable_memwrite()
687 		malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);  in malidp550_enable_memwrite()
688 		malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);  in malidp550_enable_memwrite()
691 		malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);  in malidp550_enable_memwrite()
692 		malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);  in malidp550_enable_memwrite()
693 		malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE);  in malidp550_enable_memwrite()
699 	malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h),  in malidp550_enable_memwrite()
701 	malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN,  in malidp550_enable_memwrite()
708 			malidp_hw_write(hwdev, rgb2yuv_coeffs[i],  in malidp550_enable_memwrite()
716 static void malidp550_disable_memwrite(struct malidp_hw_device *hwdev)  in malidp550_disable_memwrite()  argument
718 	u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);  in malidp550_disable_memwrite()
720 	malidp_hw_clearbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN,  in malidp550_disable_memwrite()
722 	malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC);  in malidp550_disable_memwrite()
725 static int malidp650_query_hw(struct malidp_hw_device *hwdev)  in malidp650_query_hw()  argument
727 	u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID);  in malidp650_query_hw()
730 	hwdev->min_line_size = 4;  in malidp650_query_hw()
736 		hwdev->max_line_size = 0;  in malidp650_query_hw()
739 		hwdev->max_line_size = SZ_4K;  in malidp650_query_hw()
744 		hwdev->max_line_size = 2560;  in malidp650_query_hw()
749 	hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K;  in malidp650_query_hw()
917 static void malidp_hw_clear_irq(struct malidp_hw_device *hwdev, u8 block, u32 irq)  in malidp_hw_clear_irq()  argument
919 	u32 base = malidp_get_block_base(hwdev, block);  in malidp_hw_clear_irq()
921 	if (hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ)  in malidp_hw_clear_irq()
922 		malidp_hw_write(hwdev, irq, base + MALIDP_REG_CLEARIRQ);  in malidp_hw_clear_irq()
924 		malidp_hw_write(hwdev, irq, base + MALIDP_REG_STATUS);  in malidp_hw_clear_irq()
931 	struct malidp_hw_device *hwdev;  in malidp_de_irq()  local
937 	hwdev = malidp->dev;  in malidp_de_irq()
938 	hw = hwdev->hw;  in malidp_de_irq()
946 	if (hwdev->pm_suspended)  in malidp_de_irq()
950 	dc_status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS);  in malidp_de_irq()
952 		malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, dc_status);  in malidp_de_irq()
964 	status = malidp_hw_read(hwdev, MALIDP_REG_STATUS);  in malidp_de_irq()
968 	mask = malidp_hw_read(hwdev, MALIDP_REG_MASKIRQ);  in malidp_de_irq()
980 	malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, status);  in malidp_de_irq()
995 void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev)  in malidp_de_irq_hw_init()  argument
998 	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);  in malidp_de_irq_hw_init()
999 	malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);  in malidp_de_irq_hw_init()
1000 	malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);  in malidp_de_irq_hw_init()
1001 	malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);  in malidp_de_irq_hw_init()
1004 	malidp_hw_enable_irq(hwdev, MALIDP_DC_BLOCK,  in malidp_de_irq_hw_init()
1005 			     hwdev->hw->map.dc_irq_map.irq_mask);  in malidp_de_irq_hw_init()
1008 	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,  in malidp_de_irq_hw_init()
1009 			     hwdev->hw->map.de_irq_map.irq_mask);  in malidp_de_irq_hw_init()
1015 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_de_irq_init()  local
1019 	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);  in malidp_de_irq_init()
1020 	malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff);  in malidp_de_irq_init()
1021 	malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);  in malidp_de_irq_init()
1022 	malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff);  in malidp_de_irq_init()
1032 	malidp_de_irq_hw_init(hwdev);  in malidp_de_irq_init()
1037 void malidp_de_irq_fini(struct malidp_hw_device *hwdev)  in malidp_de_irq_fini()  argument
1039 	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,  in malidp_de_irq_fini()
1040 			      hwdev->hw->map.de_irq_map.irq_mask);  in malidp_de_irq_fini()
1041 	malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK,  in malidp_de_irq_fini()
1042 			      hwdev->hw->map.dc_irq_map.irq_mask);  in malidp_de_irq_fini()
1049 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_se_irq()  local
1050 	struct malidp_hw *hw = hwdev->hw;  in malidp_se_irq()
1059 	if (hwdev->pm_suspended)  in malidp_se_irq()
1062 	status = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_STATUS);  in malidp_se_irq()
1071 	mask = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_MASKIRQ);  in malidp_se_irq()
1075 		switch (hwdev->mw_state) {  in malidp_se_irq()
1082 			hwdev->mw_state = MW_NOT_ENABLED;  in malidp_se_irq()
1089 			hw->disable_memwrite(hwdev);  in malidp_se_irq()
1095 			status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS);  in malidp_se_irq()
1098 				hw->set_config_valid(hwdev, 1);  in malidp_se_irq()
1103 	malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, status);  in malidp_se_irq()
1108 void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev)  in malidp_se_irq_hw_init()  argument
1111 	malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);  in malidp_se_irq_hw_init()
1112 	malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);  in malidp_se_irq_hw_init()
1114 	malidp_hw_enable_irq(hwdev, MALIDP_SE_BLOCK,  in malidp_se_irq_hw_init()
1115 			     hwdev->hw->map.se_irq_map.irq_mask);  in malidp_se_irq_hw_init()
1126 	struct malidp_hw_device *hwdev = malidp->dev;  in malidp_se_irq_init()  local
1130 	malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);  in malidp_se_irq_init()
1131 	malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff);  in malidp_se_irq_init()
1141 	hwdev->mw_state = MW_NOT_ENABLED;  in malidp_se_irq_init()
1142 	malidp_se_irq_hw_init(hwdev);  in malidp_se_irq_init()
1147 void malidp_se_irq_fini(struct malidp_hw_device *hwdev)  in malidp_se_irq_fini()  argument
1149 	malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK,  in malidp_se_irq_fini()
1150 			      hwdev->hw->map.se_irq_map.irq_mask);  in malidp_se_irq_fini()