Lines Matching refs:hwmgr
83 static int vegam_smu_init(struct pp_hwmgr *hwmgr) in vegam_smu_init() argument
91 hwmgr->smu_backend = smu_data; in vegam_smu_init()
93 if (smu7_init(hwmgr)) { in vegam_smu_init()
101 static int vegam_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) in vegam_start_smu_in_protection_mode() argument
109 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
112 result = smu7_upload_smu_firmware_image(hwmgr); in vegam_start_smu_in_protection_mode()
117 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0); in vegam_start_smu_in_protection_mode()
119 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
123 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
127 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS, INTERRUPTS_ENABLED, 1); in vegam_start_smu_in_protection_mode()
131 smu7_send_msg_to_smc_offset(hwmgr); in vegam_start_smu_in_protection_mode()
136 PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, SMU_STATUS, SMU_DONE, 0); in vegam_start_smu_in_protection_mode()
138 if (1 != PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
142 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixFIRMWARE_FLAGS, 0); in vegam_start_smu_in_protection_mode()
144 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
147 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_protection_mode()
151 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS, INTERRUPTS_ENABLED, 1); in vegam_start_smu_in_protection_mode()
156 static int vegam_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr) in vegam_start_smu_in_non_protection_mode() argument
161 PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, RCU_UC_EVENTS, boot_seq_done, 0); in vegam_start_smu_in_non_protection_mode()
165 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_non_protection_mode()
168 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_non_protection_mode()
172 result = smu7_upload_smu_firmware_image(hwmgr); in vegam_start_smu_in_non_protection_mode()
177 smu7_program_jump_on_start(hwmgr); in vegam_start_smu_in_non_protection_mode()
179 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_non_protection_mode()
182 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in vegam_start_smu_in_non_protection_mode()
187 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, in vegam_start_smu_in_non_protection_mode()
193 static int vegam_start_smu(struct pp_hwmgr *hwmgr) in vegam_start_smu() argument
196 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_start_smu()
199 if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) { in vegam_start_smu()
200 smu_data->protected_mode = (uint8_t)(PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, in vegam_start_smu()
203 hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL)); in vegam_start_smu()
207 result = vegam_start_smu_in_non_protection_mode(hwmgr); in vegam_start_smu()
209 result = vegam_start_smu_in_protection_mode(hwmgr); in vegam_start_smu()
216 smu7_read_smc_sram_dword(hwmgr, in vegam_start_smu()
221 result = smu7_request_smu_load_fw(hwmgr); in vegam_start_smu()
226 static int vegam_process_firmware_header(struct pp_hwmgr *hwmgr) in vegam_process_firmware_header() argument
228 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_process_firmware_header()
229 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_process_firmware_header()
234 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
244 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
256 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
264 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
274 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
284 result = smu7_read_smc_sram_dword(hwmgr, in vegam_process_firmware_header()
290 hwmgr->microcode_version_info.SMC = tmp; in vegam_process_firmware_header()
297 static bool vegam_is_dpm_running(struct pp_hwmgr *hwmgr) in vegam_is_dpm_running() argument
299 return (1 == PHM_READ_INDIRECT_FIELD(hwmgr->device, in vegam_is_dpm_running()
332 static int vegam_update_uvd_smc_table(struct pp_hwmgr *hwmgr) in vegam_update_uvd_smc_table() argument
334 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_update_uvd_smc_table()
337 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
347 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_uvd_smc_table()
351 cgs_write_ind_register(hwmgr->device, in vegam_update_uvd_smc_table()
354 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_uvd_smc_table()
356 phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_uvd_smc_table()
358 smum_send_msg_to_smc_with_parameter(hwmgr, in vegam_update_uvd_smc_table()
364 static int vegam_update_vce_smc_table(struct pp_hwmgr *hwmgr) in vegam_update_vce_smc_table() argument
366 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_update_vce_smc_table()
369 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
371 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_vce_smc_table()
382 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_vce_smc_table()
386 cgs_write_ind_register(hwmgr->device, in vegam_update_vce_smc_table()
389 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) in vegam_update_vce_smc_table()
390 smum_send_msg_to_smc_with_parameter(hwmgr, in vegam_update_vce_smc_table()
396 static int vegam_update_bif_smc_table(struct pp_hwmgr *hwmgr) in vegam_update_bif_smc_table() argument
398 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_update_bif_smc_table()
400 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
413 static int vegam_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) in vegam_update_smc_table() argument
417 vegam_update_uvd_smc_table(hwmgr); in vegam_update_smc_table()
420 vegam_update_vce_smc_table(hwmgr); in vegam_update_smc_table()
423 vegam_update_bif_smc_table(hwmgr); in vegam_update_smc_table()
431 static void vegam_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) in vegam_initialize_power_tune_defaults() argument
433 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_initialize_power_tune_defaults()
435 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
448 static int vegam_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, in vegam_populate_smc_mvdd_table() argument
451 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_mvdd_table()
475 static int vegam_populate_smc_vddci_table(struct pp_hwmgr *hwmgr, in vegam_populate_smc_vddci_table() argument
479 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_vddci_table()
500 static int vegam_populate_cac_table(struct pp_hwmgr *hwmgr, in vegam_populate_cac_table() argument
505 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_cac_table()
507 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
529 static int vegam_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr, in vegam_populate_smc_voltage_tables() argument
532 vegam_populate_smc_vddci_table(hwmgr, table); in vegam_populate_smc_voltage_tables()
533 vegam_populate_smc_mvdd_table(hwmgr, table); in vegam_populate_smc_voltage_tables()
534 vegam_populate_cac_table(hwmgr, table); in vegam_populate_smc_voltage_tables()
539 static int vegam_populate_ulv_level(struct pp_hwmgr *hwmgr, in vegam_populate_ulv_level() argument
542 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_ulv_level()
544 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
562 static int vegam_populate_ulv_state(struct pp_hwmgr *hwmgr, in vegam_populate_ulv_state() argument
565 return vegam_populate_ulv_level(hwmgr, &table->Ulv); in vegam_populate_ulv_state()
568 static int vegam_populate_smc_link_level(struct pp_hwmgr *hwmgr, in vegam_populate_smc_link_level() argument
571 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_link_level()
573 (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_smc_link_level()
600 static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, in vegam_get_dependency_volt_by_clk() argument
606 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_get_dependency_volt_by_clk()
667 static void vegam_get_sclk_range_table(struct pp_hwmgr *hwmgr, in vegam_get_sclk_range_table() argument
670 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_get_sclk_range_table()
675 ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in vegam_get_sclk_range_table()
677 if (0 == atomctrl_get_smc_sclk_range_table(hwmgr, &range_table_from_vbios)) { in vegam_get_sclk_range_table()
717 static int vegam_calculate_sclk_params(struct pp_hwmgr *hwmgr, in vegam_calculate_sclk_params() argument
720 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_calculate_sclk_params()
731 result = atomctrl_get_engine_pll_dividers_ai(hwmgr, clock, ÷rs); in vegam_calculate_sclk_params()
747 ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in vegam_calculate_sclk_params()
807 static int vegam_populate_single_graphic_level(struct pp_hwmgr *hwmgr, in vegam_populate_single_graphic_level() argument
813 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_single_graphic_level()
815 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
818 result = vegam_calculate_sclk_params(hwmgr, clock, &curr_sclk_setting); in vegam_populate_single_graphic_level()
821 result = vegam_get_dependency_volt_by_clk(hwmgr, in vegam_populate_single_graphic_level()
837 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
839 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) in vegam_populate_single_graphic_level()
841 hwmgr->display_config->min_core_set_clock_in_sr); in vegam_populate_single_graphic_level()
862 static int vegam_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) in vegam_populate_all_graphic_levels() argument
864 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_all_graphic_levels()
865 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_all_graphic_levels()
868 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
884 vegam_get_sclk_range_table(hwmgr, &(smu_data->smc_state_table)); in vegam_populate_all_graphic_levels()
888 result = vegam_populate_single_graphic_level(hwmgr, in vegam_populate_all_graphic_levels()
902 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_populate_all_graphic_levels()
955 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in vegam_populate_all_graphic_levels()
961 static int vegam_calculate_mclk_params(struct pp_hwmgr *hwmgr, in vegam_calculate_mclk_params() argument
966 PP_ASSERT_WITH_CODE(!atomctrl_get_memory_pll_dividers_ai(hwmgr, in vegam_calculate_mclk_params()
979 static int vegam_populate_single_memory_level(struct pp_hwmgr *hwmgr, in vegam_populate_single_memory_level() argument
982 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_single_memory_level()
984 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
990 result = vegam_get_dependency_volt_by_clk(hwmgr, in vegam_populate_single_memory_level()
998 result = vegam_calculate_mclk_params(hwmgr, clock, mem_level); in vegam_populate_single_memory_level()
1011 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in vegam_populate_single_memory_level()
1015 (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, in vegam_populate_single_memory_level()
1031 static int vegam_populate_all_memory_levels(struct pp_hwmgr *hwmgr) in vegam_populate_all_memory_levels() argument
1033 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_all_memory_levels()
1034 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_all_memory_levels()
1050 result = vegam_populate_single_memory_level(hwmgr, in vegam_populate_all_memory_levels()
1076 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in vegam_populate_all_memory_levels()
1082 static int vegam_populate_mvdd_value(struct pp_hwmgr *hwmgr, in vegam_populate_mvdd_value() argument
1085 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_mvdd_value()
1087 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
1107 static int vegam_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, in vegam_populate_smc_acpi_level() argument
1112 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_acpi_level()
1114 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_smc_acpi_level()
1124 result = vegam_get_dependency_volt_by_clk(hwmgr, in vegam_populate_smc_acpi_level()
1133 result = vegam_calculate_sclk_params(hwmgr, sclk_frequency, in vegam_populate_smc_acpi_level()
1162 result = vegam_get_dependency_volt_by_clk(hwmgr, in vegam_populate_smc_acpi_level()
1176 if (!vegam_populate_mvdd_value(hwmgr, in vegam_populate_smc_acpi_level()
1182 if (!vegam_populate_mvdd_value(hwmgr, 0, &vol_level)) in vegam_populate_smc_acpi_level()
1203 static int vegam_populate_smc_vce_level(struct pp_hwmgr *hwmgr, in vegam_populate_smc_vce_level() argument
1210 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_smc_vce_level()
1213 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_vce_level()
1239 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in vegam_populate_smc_vce_level()
1253 static int vegam_populate_memory_timing_parameters(struct pp_hwmgr *hwmgr, in vegam_populate_memory_timing_parameters() argument
1265 result = atomctrl_set_engine_dram_timings_rv770(hwmgr, in vegam_populate_memory_timing_parameters()
1271 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in vegam_populate_memory_timing_parameters()
1272 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in vegam_populate_memory_timing_parameters()
1273 burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in vegam_populate_memory_timing_parameters()
1274 rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE); in vegam_populate_memory_timing_parameters()
1275 misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3); in vegam_populate_memory_timing_parameters()
1286 static int vegam_program_memory_timing_parameters(struct pp_hwmgr *hwmgr) in vegam_program_memory_timing_parameters() argument
1288 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_program_memory_timing_parameters()
1289 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_program_memory_timing_parameters()
1298 result = vegam_populate_memory_timing_parameters(hwmgr, in vegam_program_memory_timing_parameters()
1308 hwmgr, in vegam_program_memory_timing_parameters()
1316 static int vegam_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, in vegam_populate_smc_uvd_level() argument
1323 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_smc_uvd_level()
1326 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_uvd_level()
1351 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in vegam_populate_smc_uvd_level()
1358 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in vegam_populate_smc_uvd_level()
1373 static int vegam_populate_smc_boot_level(struct pp_hwmgr *hwmgr, in vegam_populate_smc_boot_level() argument
1377 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_boot_level()
1405 static int vegam_populate_smc_initial_state(struct pp_hwmgr *hwmgr) in vegam_populate_smc_initial_state() argument
1407 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_smc_initial_state()
1408 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_smc_initial_state()
1410 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_smc_initial_state()
1442 static int vegam_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) in vegam_populate_bapm_parameters_in_dpm_table() argument
1444 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_bapm_parameters_in_dpm_table()
1449 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_bapm_parameters_in_dpm_table()
1452 &hwmgr->thermal_controller.advanceFanControlParameters; in vegam_populate_bapm_parameters_in_dpm_table()
1490 static int vegam_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) in vegam_populate_clock_stretcher_data_table() argument
1494 (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_clock_stretcher_data_table()
1498 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_clock_stretcher_data_table()
1505 atomctrl_read_efuse(hwmgr, STRAP_ASIC_RO_LSB, STRAP_ASIC_RO_MSB, in vegam_populate_clock_stretcher_data_table()
1540 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vegam_populate_clock_stretcher_data_table()
1547 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in vegam_populate_clock_stretcher_data_table()
1549 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value); in vegam_populate_clock_stretcher_data_table()
1554 static bool vegam_is_hw_avfs_present(struct pp_hwmgr *hwmgr) in vegam_is_hw_avfs_present() argument
1558 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_is_hw_avfs_present()
1568 static int vegam_populate_avfs_parameters(struct pp_hwmgr *hwmgr) in vegam_populate_avfs_parameters() argument
1570 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_avfs_parameters()
1571 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_avfs_parameters()
1581 (struct phm_ppt_v1_information *)hwmgr->pptable; in vegam_populate_avfs_parameters()
1585 if (!hwmgr->avfs_supported) in vegam_populate_avfs_parameters()
1588 result = atomctrl_get_avfs_information(hwmgr, &avfs_params); in vegam_populate_avfs_parameters()
1643 result = smu7_read_smc_sram_dword(hwmgr, in vegam_populate_avfs_parameters()
1647 smu7_copy_bytes_to_smc(hwmgr, in vegam_populate_avfs_parameters()
1653 result = smu7_read_smc_sram_dword(hwmgr, in vegam_populate_avfs_parameters()
1657 smu7_copy_bytes_to_smc(hwmgr, in vegam_populate_avfs_parameters()
1674 static int vegam_populate_vr_config(struct pp_hwmgr *hwmgr, in vegam_populate_vr_config() argument
1677 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_populate_vr_config()
1679 (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_vr_config()
1710 cgs_write_ind_register(hwmgr->device, in vegam_populate_vr_config()
1724 cgs_write_ind_register(hwmgr->device, in vegam_populate_vr_config()
1737 static int vegam_populate_svi_load_line(struct pp_hwmgr *hwmgr) in vegam_populate_svi_load_line() argument
1739 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_svi_load_line()
1750 static int vegam_populate_tdc_limit(struct pp_hwmgr *hwmgr) in vegam_populate_tdc_limit() argument
1753 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_tdc_limit()
1755 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_tdc_limit()
1768 static int vegam_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in vegam_populate_dw8() argument
1770 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_dw8()
1774 if (smu7_read_smc_sram_dword(hwmgr, in vegam_populate_dw8()
1792 static int vegam_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in vegam_populate_temperature_scaler() argument
1795 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_temperature_scaler()
1804 static int vegam_populate_fuzzy_fan(struct pp_hwmgr *hwmgr) in vegam_populate_fuzzy_fan() argument
1806 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_fuzzy_fan()
1809 if ((hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity & (1 << 15)) in vegam_populate_fuzzy_fan()
1810 || 0 == hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity) in vegam_populate_fuzzy_fan()
1811 hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity = in vegam_populate_fuzzy_fan()
1812 hwmgr->thermal_controller.advanceFanControlParameters.usDefaultFanOutputSensitivity; in vegam_populate_fuzzy_fan()
1815 hwmgr->thermal_controller.advanceFanControlParameters.usFanOutputSensitivity); in vegam_populate_fuzzy_fan()
1819 static int vegam_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in vegam_populate_gnb_lpml() argument
1822 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_gnb_lpml()
1831 static int vegam_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) in vegam_populate_bapm_vddc_base_leakage_sidd() argument
1833 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_bapm_vddc_base_leakage_sidd()
1835 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_bapm_vddc_base_leakage_sidd()
1851 static int vegam_populate_pm_fuses(struct pp_hwmgr *hwmgr) in vegam_populate_pm_fuses() argument
1853 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_populate_pm_fuses()
1856 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_populate_pm_fuses()
1858 if (smu7_read_smc_sram_dword(hwmgr, in vegam_populate_pm_fuses()
1866 if (vegam_populate_svi_load_line(hwmgr)) in vegam_populate_pm_fuses()
1871 if (vegam_populate_tdc_limit(hwmgr)) in vegam_populate_pm_fuses()
1875 if (vegam_populate_dw8(hwmgr, pm_fuse_table_offset)) in vegam_populate_pm_fuses()
1881 if (0 != vegam_populate_temperature_scaler(hwmgr)) in vegam_populate_pm_fuses()
1886 if (vegam_populate_fuzzy_fan(hwmgr)) in vegam_populate_pm_fuses()
1891 if (vegam_populate_gnb_lpml(hwmgr)) in vegam_populate_pm_fuses()
1896 if (vegam_populate_bapm_vddc_base_leakage_sidd(hwmgr)) in vegam_populate_pm_fuses()
1901 if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset, in vegam_populate_pm_fuses()
1912 static int vegam_enable_reconfig_cus(struct pp_hwmgr *hwmgr) in vegam_enable_reconfig_cus() argument
1914 struct amdgpu_device *adev = hwmgr->adev; in vegam_enable_reconfig_cus()
1916 smum_send_msg_to_smc_with_parameter(hwmgr, in vegam_enable_reconfig_cus()
1923 static int vegam_init_smc_table(struct pp_hwmgr *hwmgr) in vegam_init_smc_table() argument
1926 struct smu7_hwmgr *hw_data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_init_smc_table()
1927 struct vegam_smumgr *smu_data = (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_init_smc_table()
1930 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_init_smc_table()
1938 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
1941 vegam_initialize_power_tune_defaults(hwmgr); in vegam_init_smc_table()
1944 vegam_populate_smc_voltage_tables(hwmgr, table); in vegam_init_smc_table()
1947 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
1951 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
1959 result = vegam_populate_ulv_state(hwmgr, table); in vegam_init_smc_table()
1962 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in vegam_init_smc_table()
1966 result = vegam_populate_smc_link_level(hwmgr, table); in vegam_init_smc_table()
1970 result = vegam_populate_all_graphic_levels(hwmgr); in vegam_init_smc_table()
1974 result = vegam_populate_all_memory_levels(hwmgr); in vegam_init_smc_table()
1978 result = vegam_populate_smc_acpi_level(hwmgr, table); in vegam_init_smc_table()
1982 result = vegam_populate_smc_vce_level(hwmgr, table); in vegam_init_smc_table()
1990 result = vegam_program_memory_timing_parameters(hwmgr); in vegam_init_smc_table()
1994 result = vegam_populate_smc_uvd_level(hwmgr, table); in vegam_init_smc_table()
1998 result = vegam_populate_smc_boot_level(hwmgr, table); in vegam_init_smc_table()
2002 result = vegam_populate_smc_initial_state(hwmgr); in vegam_init_smc_table()
2006 result = vegam_populate_bapm_parameters_in_dpm_table(hwmgr); in vegam_init_smc_table()
2010 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2012 result = vegam_populate_clock_stretcher_data_table(hwmgr); in vegam_init_smc_table()
2018 result = vegam_populate_avfs_parameters(hwmgr); in vegam_init_smc_table()
2048 result = vegam_populate_vr_config(hwmgr, table); in vegam_init_smc_table()
2055 if (atomctrl_get_pp_assign_pin(hwmgr, in vegam_init_smc_table()
2063 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2067 if (atomctrl_get_pp_assign_pin(hwmgr, in vegam_init_smc_table()
2070 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2072 !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme)) in vegam_init_smc_table()
2073 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2077 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2082 if (atomctrl_get_pp_assign_pin(hwmgr, in vegam_init_smc_table()
2092 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in vegam_init_smc_table()
2097 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2099 phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
2110 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in vegam_init_smc_table()
2139 result = smu7_copy_bytes_to_smc(hwmgr, in vegam_init_smc_table()
2148 result = vegam_populate_pm_fuses(hwmgr); in vegam_init_smc_table()
2152 result = vegam_enable_reconfig_cus(hwmgr); in vegam_init_smc_table()
2201 static int vegam_program_mem_timing_parameters(struct pp_hwmgr *hwmgr) in vegam_program_mem_timing_parameters() argument
2203 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_program_mem_timing_parameters()
2209 return vegam_program_memory_timing_parameters(hwmgr); in vegam_program_mem_timing_parameters()
2214 static int vegam_update_sclk_threshold(struct pp_hwmgr *hwmgr) in vegam_update_sclk_threshold() argument
2216 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_update_sclk_threshold()
2218 (struct vegam_smumgr *)(hwmgr->smu_backend); in vegam_update_sclk_threshold()
2222 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_sclk_threshold()
2231 hwmgr, in vegam_update_sclk_threshold()
2242 result = vegam_program_mem_timing_parameters(hwmgr); in vegam_update_sclk_threshold()
2250 int vegam_thermal_avfs_enable(struct pp_hwmgr *hwmgr) in vegam_thermal_avfs_enable() argument
2252 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in vegam_thermal_avfs_enable()
2255 if (!hwmgr->avfs_supported) in vegam_thermal_avfs_enable()
2258 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs); in vegam_thermal_avfs_enable()
2261 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage); in vegam_thermal_avfs_enable()
2267 static int vegam_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) in vegam_thermal_setup_fan_table() argument
2269 PP_ASSERT_WITH_CODE(hwmgr->thermal_controller.fanInfo.bNoFan, in vegam_thermal_setup_fan_table()
2272 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vegam_thermal_setup_fan_table()