Lines Matching refs:UvdLevel

1333 		table->UvdLevel[count].MinVoltage = 0;  in vegam_populate_smc_uvd_level()
1334 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;  in vegam_populate_smc_uvd_level()
1335 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;  in vegam_populate_smc_uvd_level()
1336 		table->UvdLevel[count].MinVoltage |=  in vegam_populate_smc_uvd_level()
1347 		table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;  in vegam_populate_smc_uvd_level()
1348 		table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;  in vegam_populate_smc_uvd_level()
1352 				table->UvdLevel[count].VclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1356 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1359 				table->UvdLevel[count].DclkFrequency, &dividers);  in vegam_populate_smc_uvd_level()
1363 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;  in vegam_populate_smc_uvd_level()
1365 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);  in vegam_populate_smc_uvd_level()
1366 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);  in vegam_populate_smc_uvd_level()
1367 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage);  in vegam_populate_smc_uvd_level()