Lines Matching refs:hwmgr
99 static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) in fiji_start_smu_in_protection_mode() argument
107 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
110 result = smu7_upload_smu_firmware_image(hwmgr); in fiji_start_smu_in_protection_mode()
115 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
118 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
122 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
130 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
134 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
137 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS, in fiji_start_smu_in_protection_mode()
140 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000); in fiji_start_smu_in_protection_mode()
141 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test); in fiji_start_smu_in_protection_mode()
142 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in fiji_start_smu_in_protection_mode()
145 PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, in fiji_start_smu_in_protection_mode()
149 if (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_protection_mode()
156 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, in fiji_start_smu_in_protection_mode()
162 static int fiji_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr) in fiji_start_smu_in_non_protection_mode() argument
167 PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, in fiji_start_smu_in_non_protection_mode()
171 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
175 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
178 result = smu7_upload_smu_firmware_image(hwmgr); in fiji_start_smu_in_non_protection_mode()
183 smu7_program_jump_on_start(hwmgr); in fiji_start_smu_in_non_protection_mode()
186 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
190 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_start_smu_in_non_protection_mode()
194 PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, in fiji_start_smu_in_non_protection_mode()
200 static int fiji_start_avfs_btc(struct pp_hwmgr *hwmgr) in fiji_start_avfs_btc() argument
203 struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in fiji_start_avfs_btc()
206 if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr, in fiji_start_avfs_btc()
214 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); in fiji_start_avfs_btc()
216 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in fiji_start_avfs_btc()
218 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in fiji_start_avfs_btc()
223 static int fiji_setup_graphics_level_structure(struct pp_hwmgr *hwmgr) in fiji_setup_graphics_level_structure() argument
230 PP_ASSERT_WITH_CODE(0 == smu7_read_smc_sram_dword(hwmgr, in fiji_setup_graphics_level_structure()
245 PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(hwmgr, vr_config_addr, in fiji_setup_graphics_level_structure()
253 PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(hwmgr, level_addr, in fiji_setup_graphics_level_structure()
261 static int fiji_avfs_event_mgr(struct pp_hwmgr *hwmgr) in fiji_avfs_event_mgr() argument
263 if (!hwmgr->avfs_supported) in fiji_avfs_event_mgr()
266 PP_ASSERT_WITH_CODE(0 == fiji_setup_graphics_level_structure(hwmgr), in fiji_avfs_event_mgr()
270 PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr), in fiji_avfs_event_mgr()
274 PP_ASSERT_WITH_CODE(0 == fiji_start_avfs_btc(hwmgr), in fiji_avfs_event_mgr()
282 static int fiji_start_smu(struct pp_hwmgr *hwmgr) in fiji_start_smu() argument
285 struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_start_smu()
288 if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) { in fiji_start_smu()
290 if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, in fiji_start_smu()
293 result = fiji_start_smu_in_non_protection_mode(hwmgr); in fiji_start_smu()
297 result = fiji_start_smu_in_protection_mode(hwmgr); in fiji_start_smu()
301 if (fiji_avfs_event_mgr(hwmgr)) in fiji_start_smu()
302 hwmgr->avfs_supported = false; in fiji_start_smu()
306 amdgpu_device_ip_set_clockgating_state(hwmgr->adev, in fiji_start_smu()
308 amdgpu_device_ip_set_clockgating_state(hwmgr->adev, in fiji_start_smu()
310 amdgpu_device_ip_set_clockgating_state(hwmgr->adev, in fiji_start_smu()
312 amdgpu_device_ip_set_clockgating_state(hwmgr->adev, in fiji_start_smu()
318 smu7_read_smc_sram_dword(hwmgr, in fiji_start_smu()
323 result = smu7_request_smu_load_fw(hwmgr); in fiji_start_smu()
328 static bool fiji_is_hw_avfs_present(struct pp_hwmgr *hwmgr) in fiji_is_hw_avfs_present() argument
334 if (!hwmgr->not_vf) in fiji_is_hw_avfs_present()
337 if (!atomctrl_read_efuse(hwmgr, AVFS_EN_LSB, AVFS_EN_MSB, in fiji_is_hw_avfs_present()
345 static int fiji_smu_init(struct pp_hwmgr *hwmgr) in fiji_smu_init() argument
354 hwmgr->smu_backend = fiji_priv; in fiji_smu_init()
356 if (smu7_init(hwmgr)) { in fiji_smu_init()
364 static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, in fiji_get_dependency_volt_by_clk() argument
370 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_get_dependency_volt_by_clk()
479 static void fiji_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) in fiji_initialize_power_tune_defaults() argument
481 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_initialize_power_tune_defaults()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
496 static int fiji_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) in fiji_populate_bapm_parameters_in_dpm_table() argument
499 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_bapm_parameters_in_dpm_table()
505 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
508 &hwmgr->thermal_controller.advanceFanControlParameters; in fiji_populate_bapm_parameters_in_dpm_table()
580 static int fiji_populate_svi_load_line(struct pp_hwmgr *hwmgr) in fiji_populate_svi_load_line() argument
582 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_svi_load_line()
594 static int fiji_populate_tdc_limit(struct pp_hwmgr *hwmgr) in fiji_populate_tdc_limit() argument
597 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_tdc_limit()
599 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
615 static int fiji_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in fiji_populate_dw8() argument
617 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_dw8()
621 if (smu7_read_smc_sram_dword(hwmgr, in fiji_populate_dw8()
639 static int fiji_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in fiji_populate_temperature_scaler() argument
642 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_temperature_scaler()
651 static int fiji_populate_fuzzy_fan(struct pp_hwmgr *hwmgr) in fiji_populate_fuzzy_fan() argument
653 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_fuzzy_fan()
655 if ((hwmgr->thermal_controller.advanceFanControlParameters. in fiji_populate_fuzzy_fan()
657 0 == hwmgr->thermal_controller.advanceFanControlParameters. in fiji_populate_fuzzy_fan()
659 hwmgr->thermal_controller.advanceFanControlParameters. in fiji_populate_fuzzy_fan()
660 usFanOutputSensitivity = hwmgr->thermal_controller. in fiji_populate_fuzzy_fan()
664 PP_HOST_TO_SMC_US(hwmgr->thermal_controller. in fiji_populate_fuzzy_fan()
669 static int fiji_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in fiji_populate_gnb_lpml() argument
672 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_gnb_lpml()
681 static int fiji_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) in fiji_populate_bapm_vddc_base_leakage_sidd() argument
683 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_bapm_vddc_base_leakage_sidd()
685 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
701 static int fiji_populate_pm_fuses(struct pp_hwmgr *hwmgr) in fiji_populate_pm_fuses() argument
704 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_pm_fuses()
706 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_populate_pm_fuses()
708 if (smu7_read_smc_sram_dword(hwmgr, in fiji_populate_pm_fuses()
717 if (fiji_populate_svi_load_line(hwmgr)) in fiji_populate_pm_fuses()
722 if (fiji_populate_tdc_limit(hwmgr)) in fiji_populate_pm_fuses()
726 if (fiji_populate_dw8(hwmgr, pm_fuse_table_offset)) in fiji_populate_pm_fuses()
733 if (0 != fiji_populate_temperature_scaler(hwmgr)) in fiji_populate_pm_fuses()
739 if (fiji_populate_fuzzy_fan(hwmgr)) in fiji_populate_pm_fuses()
745 if (fiji_populate_gnb_lpml(hwmgr)) in fiji_populate_pm_fuses()
751 if (fiji_populate_bapm_vddc_base_leakage_sidd(hwmgr)) in fiji_populate_pm_fuses()
756 if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset, in fiji_populate_pm_fuses()
766 static int fiji_populate_cac_table(struct pp_hwmgr *hwmgr, in fiji_populate_cac_table() argument
771 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_cac_table()
773 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
794 static int fiji_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr, in fiji_populate_smc_voltage_tables() argument
799 result = fiji_populate_cac_table(hwmgr, table); in fiji_populate_smc_voltage_tables()
807 static int fiji_populate_ulv_level(struct pp_hwmgr *hwmgr, in fiji_populate_ulv_level() argument
813 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
832 static int fiji_populate_ulv_state(struct pp_hwmgr *hwmgr, in fiji_populate_ulv_state() argument
835 return fiji_populate_ulv_level(hwmgr, &table->Ulv); in fiji_populate_ulv_state()
838 static int fiji_populate_smc_link_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_link_level() argument
841 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_smc_link_level()
843 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_smc_link_level()
867 static int fiji_calculate_sclk_params(struct pp_hwmgr *hwmgr, in fiji_calculate_sclk_params() argument
870 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_calculate_sclk_params()
883 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock, ÷rs); in fiji_calculate_sclk_params()
890 ref_clock = atomctrl_get_reference_clock(hwmgr); in fiji_calculate_sclk_params()
910 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_calculate_sclk_params()
915 if (!atomctrl_get_engine_clock_spread_spectrum(hwmgr, in fiji_calculate_sclk_params()
948 static int fiji_populate_single_graphic_level(struct pp_hwmgr *hwmgr, in fiji_populate_single_graphic_level() argument
954 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_single_graphic_level()
956 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
959 result = fiji_calculate_sclk_params(hwmgr, clock, level); in fiji_populate_single_graphic_level()
961 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()
967 result = fiji_get_dependency_volt_by_clk(hwmgr, in fiji_populate_single_graphic_level()
988 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
990 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) in fiji_populate_single_graphic_level()
992 hwmgr->display_config->min_core_set_clock_in_sr); in fiji_populate_single_graphic_level()
1013 static int fiji_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) in fiji_populate_all_graphic_levels() argument
1015 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_all_graphic_levels()
1016 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_all_graphic_levels()
1020 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1037 result = fiji_populate_single_graphic_level(hwmgr, in fiji_populate_all_graphic_levels()
1100 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_graphic_levels()
1156 static int fiji_calculate_mclk_params(struct pp_hwmgr *hwmgr, in fiji_calculate_mclk_params() argument
1162 result = atomctrl_get_memory_pll_dividers_vi(hwmgr, clock, &mem_param); in fiji_calculate_mclk_params()
1175 static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr, in fiji_populate_single_memory_level() argument
1178 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_single_memory_level()
1180 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1185 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
1191 result = fiji_get_dependency_volt_by_clk(hwmgr, in fiji_populate_single_memory_level()
1218 (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, in fiji_populate_single_memory_level()
1222 result = fiji_calculate_mclk_params(hwmgr, clock, mem_level); in fiji_populate_single_memory_level()
1232 static int fiji_populate_all_memory_levels(struct pp_hwmgr *hwmgr) in fiji_populate_all_memory_levels() argument
1234 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_all_memory_levels()
1235 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_all_memory_levels()
1251 result = fiji_populate_single_memory_level(hwmgr, in fiji_populate_all_memory_levels()
1278 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_memory_levels()
1284 static int fiji_populate_mvdd_value(struct pp_hwmgr *hwmgr, in fiji_populate_mvdd_value() argument
1287 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_mvdd_value()
1289 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
1309 static int fiji_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_acpi_level() argument
1313 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_smc_acpi_level()
1315 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_smc_acpi_level()
1330 result = fiji_get_dependency_volt_by_clk(hwmgr, in fiji_populate_smc_acpi_level()
1346 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, in fiji_populate_smc_acpi_level()
1388 result = fiji_get_dependency_volt_by_clk(hwmgr, in fiji_populate_smc_acpi_level()
1407 if (!fiji_populate_mvdd_value(hwmgr, in fiji_populate_smc_acpi_level()
1431 static int fiji_populate_smc_vce_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_vce_level() argument
1438 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_smc_vce_level()
1456 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in fiji_populate_smc_vce_level()
1470 static int fiji_populate_smc_acp_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_acp_level() argument
1477 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_smc_acp_level()
1493 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in fiji_populate_smc_acp_level()
1506 static int fiji_populate_memory_timing_parameters(struct pp_hwmgr *hwmgr, in fiji_populate_memory_timing_parameters() argument
1516 result = atomctrl_set_engine_dram_timings_rv770(hwmgr, in fiji_populate_memory_timing_parameters()
1521 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in fiji_populate_memory_timing_parameters()
1522 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in fiji_populate_memory_timing_parameters()
1523 burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in fiji_populate_memory_timing_parameters()
1538 static int fiji_program_memory_timing_parameters(struct pp_hwmgr *hwmgr) in fiji_program_memory_timing_parameters() argument
1540 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_program_memory_timing_parameters()
1541 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_program_memory_timing_parameters()
1548 result = fiji_populate_memory_timing_parameters(hwmgr, in fiji_program_memory_timing_parameters()
1559 hwmgr, in fiji_program_memory_timing_parameters()
1567 static int fiji_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_uvd_level() argument
1574 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_smc_uvd_level()
1592 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in fiji_populate_smc_uvd_level()
1599 result = atomctrl_get_dfs_pll_dividers_vi(hwmgr, in fiji_populate_smc_uvd_level()
1614 static int fiji_populate_smc_boot_level(struct pp_hwmgr *hwmgr, in fiji_populate_smc_boot_level() argument
1618 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_smc_boot_level()
1646 static int fiji_populate_smc_initailial_state(struct pp_hwmgr *hwmgr) in fiji_populate_smc_initailial_state() argument
1648 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_smc_initailial_state()
1649 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_smc_initailial_state()
1651 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_smc_initailial_state()
1675 static int fiji_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) in fiji_populate_clock_stretcher_data_table() argument
1680 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_populate_clock_stretcher_data_table()
1684 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_clock_stretcher_data_table()
1693 efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table()
1695 efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table()
1730 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE, in fiji_populate_clock_stretcher_data_table()
1732 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE, in fiji_populate_clock_stretcher_data_table()
1734 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE, in fiji_populate_clock_stretcher_data_table()
1736 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE, in fiji_populate_clock_stretcher_data_table()
1745 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_populate_clock_stretcher_data_table()
1752 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table()
1784 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_populate_clock_stretcher_data_table()
1825 value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL); in fiji_populate_clock_stretcher_data_table()
1827 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value); in fiji_populate_clock_stretcher_data_table()
1832 static int fiji_populate_vr_config(struct pp_hwmgr *hwmgr, in fiji_populate_vr_config() argument
1835 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_populate_vr_config()
1876 static int fiji_init_arb_table_index(struct pp_hwmgr *hwmgr) in fiji_init_arb_table_index() argument
1878 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_init_arb_table_index()
1890 result = smu7_read_smc_sram_dword(hwmgr, in fiji_init_arb_table_index()
1899 return smu7_write_smc_sram_dword(hwmgr, in fiji_init_arb_table_index()
1903 static int fiji_setup_dpm_led_config(struct pp_hwmgr *hwmgr) in fiji_setup_dpm_led_config() argument
1909 result = atomctrl_get_voltage_table_v3(hwmgr, in fiji_setup_dpm_led_config()
1926 smum_send_msg_to_smc_with_parameter(hwmgr, in fiji_setup_dpm_led_config()
1932 static int fiji_init_smc_table(struct pp_hwmgr *hwmgr) in fiji_init_smc_table() argument
1935 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_init_smc_table()
1936 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_init_smc_table()
1938 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_init_smc_table()
1943 fiji_initialize_power_tune_defaults(hwmgr); in fiji_init_smc_table()
1946 fiji_populate_smc_voltage_tables(hwmgr, table); in fiji_init_smc_table()
1950 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
1954 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
1962 result = fiji_populate_ulv_state(hwmgr, table); in fiji_init_smc_table()
1965 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in fiji_init_smc_table()
1969 result = fiji_populate_smc_link_level(hwmgr, table); in fiji_init_smc_table()
1973 result = fiji_populate_all_graphic_levels(hwmgr); in fiji_init_smc_table()
1977 result = fiji_populate_all_memory_levels(hwmgr); in fiji_init_smc_table()
1981 result = fiji_populate_smc_acpi_level(hwmgr, table); in fiji_init_smc_table()
1985 result = fiji_populate_smc_vce_level(hwmgr, table); in fiji_init_smc_table()
1989 result = fiji_populate_smc_acp_level(hwmgr, table); in fiji_init_smc_table()
1997 result = fiji_program_memory_timing_parameters(hwmgr); in fiji_init_smc_table()
2001 result = fiji_populate_smc_uvd_level(hwmgr, table); in fiji_init_smc_table()
2005 result = fiji_populate_smc_boot_level(hwmgr, table); in fiji_init_smc_table()
2009 result = fiji_populate_smc_initailial_state(hwmgr); in fiji_init_smc_table()
2013 result = fiji_populate_bapm_parameters_in_dpm_table(hwmgr); in fiji_init_smc_table()
2017 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2019 result = fiji_populate_clock_stretcher_data_table(hwmgr); in fiji_init_smc_table()
2045 result = fiji_populate_vr_config(hwmgr, table); in fiji_init_smc_table()
2052 if (atomctrl_get_pp_assign_pin(hwmgr, VDDC_VRHOT_GPIO_PINID, &gpio_pin)) { in fiji_init_smc_table()
2054 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2058 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2062 if (atomctrl_get_pp_assign_pin(hwmgr, PP_AC_DC_SWITCH_GPIO_PINID, in fiji_init_smc_table()
2065 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2069 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2074 if (atomctrl_get_pp_assign_pin(hwmgr, THERMAL_INT_OUTPUT_GPIO_PINID, in fiji_init_smc_table()
2076 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2086 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in fiji_init_smc_table()
2091 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2093 phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2097 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2118 result = smu7_copy_bytes_to_smc(hwmgr, in fiji_init_smc_table()
2127 result = fiji_init_arb_table_index(hwmgr); in fiji_init_smc_table()
2131 result = fiji_populate_pm_fuses(hwmgr); in fiji_init_smc_table()
2135 result = fiji_setup_dpm_led_config(hwmgr); in fiji_init_smc_table()
2142 static int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) in fiji_thermal_setup_fan_table() argument
2144 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_thermal_setup_fan_table()
2154 if (hwmgr->thermal_controller.fanInfo.bNoFan) { in fiji_thermal_setup_fan_table()
2155 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_thermal_setup_fan_table()
2161 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_thermal_setup_fan_table()
2166 duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in fiji_thermal_setup_fan_table()
2170 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_thermal_setup_fan_table()
2175 tmp64 = hwmgr->thermal_controller.advanceFanControlParameters. in fiji_thermal_setup_fan_table()
2180 t_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usTMed - in fiji_thermal_setup_fan_table()
2181 hwmgr->thermal_controller.advanceFanControlParameters.usTMin; in fiji_thermal_setup_fan_table()
2182 t_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usTHigh - in fiji_thermal_setup_fan_table()
2183 hwmgr->thermal_controller.advanceFanControlParameters.usTMed; in fiji_thermal_setup_fan_table()
2185 pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed - in fiji_thermal_setup_fan_table()
2186 hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin; in fiji_thermal_setup_fan_table()
2187 pwm_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMHigh - in fiji_thermal_setup_fan_table()
2188 hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed; in fiji_thermal_setup_fan_table()
2193 fan_table.TempMin = cpu_to_be16((50 + hwmgr-> in fiji_thermal_setup_fan_table()
2195 fan_table.TempMed = cpu_to_be16((50 + hwmgr-> in fiji_thermal_setup_fan_table()
2197 fan_table.TempMax = cpu_to_be16((50 + hwmgr-> in fiji_thermal_setup_fan_table()
2205 fan_table.HystDown = cpu_to_be16(hwmgr-> in fiji_thermal_setup_fan_table()
2214 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in fiji_thermal_setup_fan_table()
2216 fan_table.RefreshPeriod = cpu_to_be32((hwmgr-> in fiji_thermal_setup_fan_table()
2223 hwmgr->device, CGS_IND_REG__SMC, in fiji_thermal_setup_fan_table()
2226 res = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.fan_table_start, in fiji_thermal_setup_fan_table()
2230 if (!res && hwmgr->thermal_controller. in fiji_thermal_setup_fan_table()
2232 res = smum_send_msg_to_smc_with_parameter(hwmgr, in fiji_thermal_setup_fan_table()
2234 hwmgr->thermal_controller. in fiji_thermal_setup_fan_table()
2237 if (!res && hwmgr->thermal_controller. in fiji_thermal_setup_fan_table()
2239 res = smum_send_msg_to_smc_with_parameter(hwmgr, in fiji_thermal_setup_fan_table()
2241 hwmgr->thermal_controller. in fiji_thermal_setup_fan_table()
2245 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_thermal_setup_fan_table()
2252 static int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr) in fiji_thermal_avfs_enable() argument
2254 if (!hwmgr->avfs_supported) in fiji_thermal_avfs_enable()
2257 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs); in fiji_thermal_avfs_enable()
2262 static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr) in fiji_program_mem_timing_parameters() argument
2264 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_program_mem_timing_parameters()
2268 return fiji_program_memory_timing_parameters(hwmgr); in fiji_program_mem_timing_parameters()
2273 static int fiji_update_sclk_threshold(struct pp_hwmgr *hwmgr) in fiji_update_sclk_threshold() argument
2275 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_update_sclk_threshold()
2276 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_update_sclk_threshold()
2281 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_update_sclk_threshold()
2290 hwmgr, in fiji_update_sclk_threshold()
2298 result = fiji_program_mem_timing_parameters(hwmgr); in fiji_update_sclk_threshold()
2373 static int fiji_update_uvd_smc_table(struct pp_hwmgr *hwmgr) in fiji_update_uvd_smc_table() argument
2375 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_update_uvd_smc_table()
2378 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_update_uvd_smc_table()
2388 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_uvd_smc_table()
2392 cgs_write_ind_register(hwmgr->device, in fiji_update_uvd_smc_table()
2395 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_update_uvd_smc_table()
2397 phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_update_uvd_smc_table()
2399 smum_send_msg_to_smc_with_parameter(hwmgr, in fiji_update_uvd_smc_table()
2405 static int fiji_update_vce_smc_table(struct pp_hwmgr *hwmgr) in fiji_update_vce_smc_table() argument
2407 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_update_vce_smc_table()
2410 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_update_vce_smc_table()
2412 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_update_vce_smc_table()
2423 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_vce_smc_table()
2427 cgs_write_ind_register(hwmgr->device, in fiji_update_vce_smc_table()
2430 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) in fiji_update_vce_smc_table()
2431 smum_send_msg_to_smc_with_parameter(hwmgr, in fiji_update_vce_smc_table()
2437 static int fiji_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) in fiji_update_smc_table() argument
2441 fiji_update_uvd_smc_table(hwmgr); in fiji_update_smc_table()
2444 fiji_update_vce_smc_table(hwmgr); in fiji_update_smc_table()
2452 static int fiji_process_firmware_header(struct pp_hwmgr *hwmgr) in fiji_process_firmware_header() argument
2454 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_process_firmware_header()
2455 struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend); in fiji_process_firmware_header()
2460 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2470 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2482 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2490 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2500 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2510 result = smu7_read_smc_sram_dword(hwmgr, in fiji_process_firmware_header()
2516 hwmgr->microcode_version_info.SMC = tmp; in fiji_process_firmware_header()
2523 static int fiji_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) in fiji_initialize_mc_reg_table() argument
2529 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, in fiji_initialize_mc_reg_table()
2530 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in fiji_initialize_mc_reg_table()
2531 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in fiji_initialize_mc_reg_table()
2532 cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING)); in fiji_initialize_mc_reg_table()
2533 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, in fiji_initialize_mc_reg_table()
2534 cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2)); in fiji_initialize_mc_reg_table()
2535 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, in fiji_initialize_mc_reg_table()
2536 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in fiji_initialize_mc_reg_table()
2537 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, in fiji_initialize_mc_reg_table()
2538 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0)); in fiji_initialize_mc_reg_table()
2539 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in fiji_initialize_mc_reg_table()
2540 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1)); in fiji_initialize_mc_reg_table()
2541 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, in fiji_initialize_mc_reg_table()
2542 cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING)); in fiji_initialize_mc_reg_table()
2547 static bool fiji_is_dpm_running(struct pp_hwmgr *hwmgr) in fiji_is_dpm_running() argument
2549 return (1 == PHM_READ_INDIRECT_FIELD(hwmgr->device, in fiji_is_dpm_running()
2554 static int fiji_update_dpm_settings(struct pp_hwmgr *hwmgr, in fiji_update_dpm_settings() argument
2557 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in fiji_update_dpm_settings()
2559 (hwmgr->smu_backend); in fiji_update_dpm_settings()
2580 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel); in fiji_update_dpm_settings()
2589 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
2591 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
2603 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
2606 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
2610 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel); in fiji_update_dpm_settings()
2615 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel); in fiji_update_dpm_settings()
2624 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
2626 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
2638 tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset)); in fiji_update_dpm_settings()
2641 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp)); in fiji_update_dpm_settings()
2645 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel); in fiji_update_dpm_settings()