Lines Matching refs:ucNumEntries

81 	PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0,  in check_powerplay_tables()
282 PP_ASSERT_WITH_CODE((mm_dependency_table->ucNumEntries != 0), in get_mm_clock_voltage_table()
287 mm_dependency_table->ucNumEntries; in get_mm_clock_voltage_table()
293 mm_table->count = mm_dependency_table->ucNumEntries; in get_mm_clock_voltage_table()
295 for (i = 0; i < mm_dependency_table->ucNumEntries; i++) { in get_mm_clock_voltage_table()
508 PP_ASSERT_WITH_CODE(clk_dep_table->ucNumEntries, in get_socclk_voltage_dependency_table()
513 clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
520 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
522 for (i = 0; i < clk_dep_table->ucNumEntries; i++) { in get_socclk_voltage_dependency_table()
542 PP_ASSERT_WITH_CODE(mclk_dep_table->ucNumEntries, in get_mclk_voltage_dependency_table()
547 mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
554 mclk_table->count = (uint32_t)mclk_dep_table->ucNumEntries; in get_mclk_voltage_dependency_table()
556 for (i = 0; i < mclk_dep_table->ucNumEntries; i++) { in get_mclk_voltage_dependency_table()
583 PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0), in get_gfxclk_voltage_dependency_table()
588 clk_dep_table->ucNumEntries; in get_gfxclk_voltage_dependency_table()
595 clk_table->count = clk_dep_table->ucNumEntries; in get_gfxclk_voltage_dependency_table()
649 PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0), in get_pix_clk_voltage_dependency_table()
654 clk_dep_table->ucNumEntries; in get_pix_clk_voltage_dependency_table()
661 clk_table->count = clk_dep_table->ucNumEntries; in get_pix_clk_voltage_dependency_table()
689 PP_ASSERT_WITH_CODE((clk_dep_table->ucNumEntries != 0), in get_dcefclk_voltage_dependency_table()
702 clk_dep_table->entries[clk_dep_table->ucNumEntries - 1].ulClk < 90000) in get_dcefclk_voltage_dependency_table()
703 num_entries = clk_dep_table->ucNumEntries + 1 > NUM_DSPCLK_LEVELS ? in get_dcefclk_voltage_dependency_table()
704 NUM_DSPCLK_LEVELS : clk_dep_table->ucNumEntries + 1; in get_dcefclk_voltage_dependency_table()
706 num_entries = clk_dep_table->ucNumEntries; in get_dcefclk_voltage_dependency_table()
720 for (i = 0; i < clk_dep_table->ucNumEntries; i++) { in get_dcefclk_voltage_dependency_table()
748 PP_ASSERT_WITH_CODE(atom_pcie_table->ucNumEntries, in get_pcie_table()
754 atom_pcie_table->ucNumEntries; in get_pcie_table()
762 if (atom_pcie_table->ucNumEntries <= pcie_count) in get_pcie_table()
763 pcie_count = atom_pcie_table->ucNumEntries; in get_pcie_table()
790 PP_ASSERT_WITH_CODE(limit_table->ucNumEntries, in get_hard_limits()
1003 PP_ASSERT_WITH_CODE((vddc_lookup_pp_tables->ucNumEntries != 0), in get_vddc_lookup_table()
1014 table->count = vddc_lookup_pp_tables->ucNumEntries; in get_vddc_lookup_table()
1016 for (i = 0; i < vddc_lookup_pp_tables->ucNumEntries; i++) in get_vddc_lookup_table()
1228 return (uint32_t)(state_arrays->ucNumEntries); in vega10_get_number_of_powerplay_table_entries()
1284 PP_ASSERT_WITH_CODE(state_arrays->ucNumEntries > 0, in vega10_get_powerplay_table_entry()
1287 PP_ASSERT_WITH_CODE((entry_index <= state_arrays->ucNumEntries), in vega10_get_powerplay_table_entry()