75 	uint16_t table_offset = get_vce_table_offset(hwmgr,  in get_vce_clock_info_array_offset()  local
78 	if (table_offset > 0)  in get_vce_clock_info_array_offset()
79 		return table_offset + 1;  in get_vce_clock_info_array_offset()
87 	uint16_t table_offset = get_vce_clock_info_array_offset(hwmgr,  in get_vce_clock_info_array_size()  local
91 	if (table_offset > 0) {  in get_vce_clock_info_array_size()
93 			(((unsigned long) powerplay_table) + table_offset);  in get_vce_clock_info_array_size()
103 	uint16_t table_offset = get_vce_clock_info_array_offset(hwmgr,  in get_vce_clock_voltage_limit_table_offset()  local
106 	if (table_offset > 0)  in get_vce_clock_voltage_limit_table_offset()
107 		return table_offset + get_vce_clock_info_array_size(hwmgr,  in get_vce_clock_voltage_limit_table_offset()
116 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in get_vce_clock_voltage_limit_table_size()  local
119 	if (table_offset > 0) {  in get_vce_clock_voltage_limit_table_size()
121 …onst ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *)(((unsigned long) powerplay_table) + table_offset);  in get_vce_clock_voltage_limit_table_size()
130 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in get_vce_state_table_offset()  local
132 	if (table_offset > 0)  in get_vce_state_table_offset()
133 		return table_offset + get_vce_clock_voltage_limit_table_size(hwmgr, powerplay_table);  in get_vce_state_table_offset()
142 	uint16_t table_offset = get_vce_state_table_offset(hwmgr, powerplay_table);  in get_vce_state_table()  local
144 	if (table_offset > 0)  in get_vce_state_table()
145 		return (const ATOM_PPLIB_VCE_State_Table *)(((unsigned long) powerplay_table) + table_offset);  in get_vce_state_table()
175 	uint16_t table_offset = get_uvd_table_offset(hwmgr,  in get_uvd_clock_info_array_offset()  local
178 	if (table_offset > 0)  in get_uvd_clock_info_array_offset()
179 		return table_offset + 1;  in get_uvd_clock_info_array_offset()
186 	uint16_t table_offset = get_uvd_clock_info_array_offset(hwmgr,  in get_uvd_clock_info_array_size()  local
190 	if (table_offset > 0) {  in get_uvd_clock_info_array_size()
193 					+ table_offset);  in get_uvd_clock_info_array_size()
205 	uint16_t table_offset = get_uvd_clock_info_array_offset(hwmgr,  in get_uvd_clock_voltage_limit_table_offset()  local
208 	if (table_offset > 0)  in get_uvd_clock_voltage_limit_table_offset()
209 		return table_offset +  in get_uvd_clock_voltage_limit_table_offset()
242 	uint16_t table_offset = get_samu_table_offset(hwmgr,  in get_samu_clock_voltage_limit_table_offset()  local
245 	if (table_offset > 0)  in get_samu_clock_voltage_limit_table_offset()
246 		return table_offset + 1;  in get_samu_clock_voltage_limit_table_offset()
1210 	uint16_t table_offset;  in init_clock_voltage_dependency()  local
1226 	table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1228 	if (vce_clock_info_array_offset > 0 && table_offset > 0) {  in init_clock_voltage_dependency()
1234 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1241 	table_offset = get_uvd_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in init_clock_voltage_dependency()
1243 	if (uvd_clock_info_array_offset > 0 && table_offset > 0) {  in init_clock_voltage_dependency()
1249 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1254 	table_offset = get_samu_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1257 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1260 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1265 	table_offset = get_acp_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1268 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1271 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1276 	table_offset = get_cacp_tdp_table_offset(hwmgr, powerplay_table);  in init_clock_voltage_dependency()
1277 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1278 		UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1283 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1292 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1355 	table_offset = get_sclk_vdd_gfx_clock_voltage_dependency_table_offset(hwmgr,  in init_clock_voltage_dependency()
1358 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1360 			(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1444 		uint16_t table_offset;  in init_dpm2_parameters()  local
1490 				table_offset = le16_to_cpu(extended_header->usPPMTableOffset);  in init_dpm2_parameters()
1492 					(((unsigned long)powerplay_table) + table_offset);  in init_dpm2_parameters()