39 int phm_setup_asic(struct pp_hwmgr *hwmgr)  in phm_setup_asic()  argument
41 	PHM_FUNC_CHECK(hwmgr);  in phm_setup_asic()
43 	if (NULL != hwmgr->hwmgr_func->asic_setup)  in phm_setup_asic()
44 		return hwmgr->hwmgr_func->asic_setup(hwmgr);  in phm_setup_asic()
49 int phm_power_down_asic(struct pp_hwmgr *hwmgr)  in phm_power_down_asic()  argument
51 	PHM_FUNC_CHECK(hwmgr);  in phm_power_down_asic()
53 	if (NULL != hwmgr->hwmgr_func->power_off_asic)  in phm_power_down_asic()
54 		return hwmgr->hwmgr_func->power_off_asic(hwmgr);  in phm_power_down_asic()
59 int phm_set_power_state(struct pp_hwmgr *hwmgr,  in phm_set_power_state()  argument
65 	PHM_FUNC_CHECK(hwmgr);  in phm_set_power_state()
70 	if (NULL != hwmgr->hwmgr_func->power_state_set)  in phm_set_power_state()
71 		return hwmgr->hwmgr_func->power_state_set(hwmgr, &states);  in phm_set_power_state()
76 int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)  in phm_enable_dynamic_state_management()  argument
80 	PHM_FUNC_CHECK(hwmgr);  in phm_enable_dynamic_state_management()
81 	adev = hwmgr->adev;  in phm_enable_dynamic_state_management()
83 	if (smum_is_dpm_running(hwmgr) && !amdgpu_passthrough(adev)) {  in phm_enable_dynamic_state_management()
88 	if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable)  in phm_enable_dynamic_state_management()
89 		ret = hwmgr->hwmgr_func->dynamic_state_management_enable(hwmgr);  in phm_enable_dynamic_state_management()
94 int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr)  in phm_disable_dynamic_state_management()  argument
98 	PHM_FUNC_CHECK(hwmgr);  in phm_disable_dynamic_state_management()
100 	if (!smum_is_dpm_running(hwmgr)) {  in phm_disable_dynamic_state_management()
105 	if (hwmgr->hwmgr_func->dynamic_state_management_disable)  in phm_disable_dynamic_state_management()
106 		ret = hwmgr->hwmgr_func->dynamic_state_management_disable(hwmgr);  in phm_disable_dynamic_state_management()
111 int phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level)  in phm_force_dpm_levels()  argument
115 	PHM_FUNC_CHECK(hwmgr);  in phm_force_dpm_levels()
117 	if (hwmgr->hwmgr_func->force_dpm_level != NULL)  in phm_force_dpm_levels()
118 		ret = hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);  in phm_force_dpm_levels()
123 int phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,  in phm_apply_state_adjust_rules()  argument
127 	PHM_FUNC_CHECK(hwmgr);  in phm_apply_state_adjust_rules()
129 	if (hwmgr->hwmgr_func->apply_state_adjust_rules != NULL)  in phm_apply_state_adjust_rules()
130 		return hwmgr->hwmgr_func->apply_state_adjust_rules(  in phm_apply_state_adjust_rules()
131 									hwmgr,  in phm_apply_state_adjust_rules()
137 int phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr)  in phm_apply_clock_adjust_rules()  argument
139 	PHM_FUNC_CHECK(hwmgr);  in phm_apply_clock_adjust_rules()
141 	if (hwmgr->hwmgr_func->apply_clocks_adjust_rules != NULL)  in phm_apply_clock_adjust_rules()
142 		return hwmgr->hwmgr_func->apply_clocks_adjust_rules(hwmgr);  in phm_apply_clock_adjust_rules()
146 int phm_powerdown_uvd(struct pp_hwmgr *hwmgr)  in phm_powerdown_uvd()  argument
148 	PHM_FUNC_CHECK(hwmgr);  in phm_powerdown_uvd()
150 	if (hwmgr->hwmgr_func->powerdown_uvd != NULL)  in phm_powerdown_uvd()
151 		return hwmgr->hwmgr_func->powerdown_uvd(hwmgr);  in phm_powerdown_uvd()
155 int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr)  in phm_enable_clock_power_gatings()  argument
157 	PHM_FUNC_CHECK(hwmgr);  in phm_enable_clock_power_gatings()
159 	if (NULL != hwmgr->hwmgr_func->enable_clock_power_gating)  in phm_enable_clock_power_gatings()
160 		return hwmgr->hwmgr_func->enable_clock_power_gating(hwmgr);  in phm_enable_clock_power_gatings()
165 int phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr)  in phm_disable_clock_power_gatings()  argument
167 	PHM_FUNC_CHECK(hwmgr);  in phm_disable_clock_power_gatings()
169 	if (NULL != hwmgr->hwmgr_func->disable_clock_power_gating)  in phm_disable_clock_power_gatings()
170 		return hwmgr->hwmgr_func->disable_clock_power_gating(hwmgr);  in phm_disable_clock_power_gatings()
175 int phm_pre_display_configuration_changed(struct pp_hwmgr *hwmgr)  in phm_pre_display_configuration_changed()  argument
177 	PHM_FUNC_CHECK(hwmgr);  in phm_pre_display_configuration_changed()
179 	if (NULL != hwmgr->hwmgr_func->pre_display_config_changed)  in phm_pre_display_configuration_changed()
180 		hwmgr->hwmgr_func->pre_display_config_changed(hwmgr);  in phm_pre_display_configuration_changed()
186 int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)  in phm_display_configuration_changed()  argument
188 	PHM_FUNC_CHECK(hwmgr);  in phm_display_configuration_changed()
190 	if (NULL != hwmgr->hwmgr_func->display_config_changed)  in phm_display_configuration_changed()
191 		hwmgr->hwmgr_func->display_config_changed(hwmgr);  in phm_display_configuration_changed()
196 int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)  in phm_notify_smc_display_config_after_ps_adjustment()  argument
198 	PHM_FUNC_CHECK(hwmgr);  in phm_notify_smc_display_config_after_ps_adjustment()
200 	if (NULL != hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment)  in phm_notify_smc_display_config_after_ps_adjustment()
201 			hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment(hwmgr);  in phm_notify_smc_display_config_after_ps_adjustment()
206 int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr)  in phm_stop_thermal_controller()  argument
208 	PHM_FUNC_CHECK(hwmgr);  in phm_stop_thermal_controller()
210 	if (hwmgr->hwmgr_func->stop_thermal_controller == NULL)  in phm_stop_thermal_controller()
213 	return hwmgr->hwmgr_func->stop_thermal_controller(hwmgr);  in phm_stop_thermal_controller()
216 int phm_register_irq_handlers(struct pp_hwmgr *hwmgr)  in phm_register_irq_handlers()  argument
218 	PHM_FUNC_CHECK(hwmgr);  in phm_register_irq_handlers()
220 	if (hwmgr->hwmgr_func->register_irq_handlers != NULL)  in phm_register_irq_handlers()
221 		return hwmgr->hwmgr_func->register_irq_handlers(hwmgr);  in phm_register_irq_handlers()
232 int phm_start_thermal_controller(struct pp_hwmgr *hwmgr)  in phm_start_thermal_controller()  argument
236 	struct amdgpu_device *adev = hwmgr->adev;  in phm_start_thermal_controller()
238 	if (hwmgr->hwmgr_func->get_thermal_temperature_range)  in phm_start_thermal_controller()
239 		hwmgr->hwmgr_func->get_thermal_temperature_range(  in phm_start_thermal_controller()
240 				hwmgr, &range);  in phm_start_thermal_controller()
242 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in phm_start_thermal_controller()
244 			&& hwmgr->hwmgr_func->start_thermal_controller != NULL)  in phm_start_thermal_controller()
245 		ret = hwmgr->hwmgr_func->start_thermal_controller(hwmgr, &range);  in phm_start_thermal_controller()
254 bool phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)  in phm_check_smc_update_required_for_display_configuration()  argument
256 	PHM_FUNC_CHECK(hwmgr);  in phm_check_smc_update_required_for_display_configuration()
258 	if (hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration == NULL)  in phm_check_smc_update_required_for_display_configuration()
261 	return hwmgr->hwmgr_func->check_smc_update_required_for_display_configuration(hwmgr);  in phm_check_smc_update_required_for_display_configuration()
265 int phm_check_states_equal(struct pp_hwmgr *hwmgr,  in phm_check_states_equal()  argument
270 	PHM_FUNC_CHECK(hwmgr);  in phm_check_states_equal()
272 	if (hwmgr->hwmgr_func->check_states_equal == NULL)  in phm_check_states_equal()
275 	return hwmgr->hwmgr_func->check_states_equal(hwmgr, pstate1, pstate2, equal);  in phm_check_states_equal()
278 int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,  in phm_store_dal_configuration_data()  argument
284 	PHM_FUNC_CHECK(hwmgr);  in phm_store_dal_configuration_data()
289 	if (NULL != hwmgr->hwmgr_func->set_deep_sleep_dcefclk)  in phm_store_dal_configuration_data()
290 		hwmgr->hwmgr_func->set_deep_sleep_dcefclk(hwmgr, display_config->min_dcef_deep_sleep_set_clk);  in phm_store_dal_configuration_data()
297 	if (NULL != hwmgr->hwmgr_func->set_active_display_count)  in phm_store_dal_configuration_data()
298 		hwmgr->hwmgr_func->set_active_display_count(hwmgr, number_of_active_display);  in phm_store_dal_configuration_data()
300 	if (hwmgr->hwmgr_func->store_cc6_data == NULL)  in phm_store_dal_configuration_data()
305 	if (hwmgr->hwmgr_func->store_cc6_data)  in phm_store_dal_configuration_data()
306 		hwmgr->hwmgr_func->store_cc6_data(hwmgr,  in phm_store_dal_configuration_data()
315 int phm_get_dal_power_level(struct pp_hwmgr *hwmgr,  in phm_get_dal_power_level()  argument
318 	PHM_FUNC_CHECK(hwmgr);  in phm_get_dal_power_level()
320 	if (info == NULL || hwmgr->hwmgr_func->get_dal_power_level == NULL)  in phm_get_dal_power_level()
322 	return hwmgr->hwmgr_func->get_dal_power_level(hwmgr, info);  in phm_get_dal_power_level()
325 int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr)  in phm_set_cpu_power_state()  argument
327 	PHM_FUNC_CHECK(hwmgr);  in phm_set_cpu_power_state()
329 	if (hwmgr->hwmgr_func->set_cpu_power_state != NULL)  in phm_set_cpu_power_state()
330 		return hwmgr->hwmgr_func->set_cpu_power_state(hwmgr);  in phm_set_cpu_power_state()
336 int phm_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,  in phm_get_performance_level()  argument
340 	PHM_FUNC_CHECK(hwmgr);  in phm_get_performance_level()
341 	if (hwmgr->hwmgr_func->get_performance_level == NULL)  in phm_get_performance_level()
344 	return hwmgr->hwmgr_func->get_performance_level(hwmgr, state, designation, index, level);  in phm_get_performance_level()
358 int phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clo…  in phm_get_clock_info()  argument
364 	PHM_FUNC_CHECK(hwmgr);  in phm_get_clock_info()
369 …result = phm_get_performance_level(hwmgr, state, PHM_PerformanceLevelDesignation_Activity, 0, &per…  in phm_get_clock_info()
379 	result = phm_get_performance_level(hwmgr, state, designation,  in phm_get_clock_info()
380 					(hwmgr->platform_descriptor.hardwareActivityPerformanceLevels - 1), &performance_level);  in phm_get_clock_info()
391 int phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *st…  in phm_get_current_shallow_sleep_clocks()  argument
393 	PHM_FUNC_CHECK(hwmgr);  in phm_get_current_shallow_sleep_clocks()
395 	if (hwmgr->hwmgr_func->get_current_shallow_sleep_clocks == NULL)  in phm_get_current_shallow_sleep_clocks()
398 	return hwmgr->hwmgr_func->get_current_shallow_sleep_clocks(hwmgr, state, clock_info);  in phm_get_current_shallow_sleep_clocks()
402 int phm_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks…  in phm_get_clock_by_type()  argument
404 	PHM_FUNC_CHECK(hwmgr);  in phm_get_clock_by_type()
406 	if (hwmgr->hwmgr_func->get_clock_by_type == NULL)  in phm_get_clock_by_type()
409 	return hwmgr->hwmgr_func->get_clock_by_type(hwmgr, type, clocks);  in phm_get_clock_by_type()
413 int phm_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,  in phm_get_clock_by_type_with_latency()  argument
417 	PHM_FUNC_CHECK(hwmgr);  in phm_get_clock_by_type_with_latency()
419 	if (hwmgr->hwmgr_func->get_clock_by_type_with_latency == NULL)  in phm_get_clock_by_type_with_latency()
422 	return hwmgr->hwmgr_func->get_clock_by_type_with_latency(hwmgr, type, clocks);  in phm_get_clock_by_type_with_latency()
426 int phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,  in phm_get_clock_by_type_with_voltage()  argument
430 	PHM_FUNC_CHECK(hwmgr);  in phm_get_clock_by_type_with_voltage()
432 	if (hwmgr->hwmgr_func->get_clock_by_type_with_voltage == NULL)  in phm_get_clock_by_type_with_voltage()
435 	return hwmgr->hwmgr_func->get_clock_by_type_with_voltage(hwmgr, type, clocks);  in phm_get_clock_by_type_with_voltage()
439 int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,  in phm_set_watermarks_for_clocks_ranges()  argument
442 	PHM_FUNC_CHECK(hwmgr);  in phm_set_watermarks_for_clocks_ranges()
444 	if (!hwmgr->hwmgr_func->set_watermarks_for_clocks_ranges)  in phm_set_watermarks_for_clocks_ranges()
447 	return hwmgr->hwmgr_func->set_watermarks_for_clocks_ranges(hwmgr,  in phm_set_watermarks_for_clocks_ranges()
451 int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,  in phm_display_clock_voltage_request()  argument
454 	PHM_FUNC_CHECK(hwmgr);  in phm_display_clock_voltage_request()
456 	if (!hwmgr->hwmgr_func->display_clock_voltage_request)  in phm_display_clock_voltage_request()
459 	return hwmgr->hwmgr_func->display_clock_voltage_request(hwmgr, clock);  in phm_display_clock_voltage_request()
462 int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks)  in phm_get_max_high_clocks()  argument
464 	PHM_FUNC_CHECK(hwmgr);  in phm_get_max_high_clocks()
466 	if (hwmgr->hwmgr_func->get_max_high_clocks == NULL)  in phm_get_max_high_clocks()
469 	return hwmgr->hwmgr_func->get_max_high_clocks(hwmgr, clocks);  in phm_get_max_high_clocks()
472 int phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr)  in phm_disable_smc_firmware_ctf()  argument
474 	PHM_FUNC_CHECK(hwmgr);  in phm_disable_smc_firmware_ctf()
476 	if (hwmgr->hwmgr_func->disable_smc_firmware_ctf == NULL)  in phm_disable_smc_firmware_ctf()
479 	return hwmgr->hwmgr_func->disable_smc_firmware_ctf(hwmgr);  in phm_disable_smc_firmware_ctf()