407 					(char)dev->node_props.marketing_name[i];  in node_show()
408 			if (dev->node_props.marketing_name[i] == 0)  in node_show()
418 			dev->node_props.cpu_cores_count);  in node_show()
420 			dev->node_props.simd_count);  in node_show()
422 			dev->node_props.mem_banks_count);  in node_show()
424 			dev->node_props.caches_count);  in node_show()
426 			dev->node_props.io_links_count);  in node_show()
428 			dev->node_props.cpu_core_id_base);  in node_show()
430 			dev->node_props.simd_id_base);  in node_show()
432 			dev->node_props.max_waves_per_simd);  in node_show()
434 			dev->node_props.lds_size_in_kb);  in node_show()
436 			dev->node_props.gds_size_in_kb);  in node_show()
438 			dev->node_props.wave_front_size);  in node_show()
440 			dev->node_props.array_count);  in node_show()
442 			dev->node_props.simd_arrays_per_engine);  in node_show()
444 			dev->node_props.cu_per_simd_array);  in node_show()
446 			dev->node_props.simd_per_cu);  in node_show()
448 			dev->node_props.max_slots_scratch_cu);  in node_show()
450 			dev->node_props.vendor_id);  in node_show()
452 			dev->node_props.device_id);  in node_show()
454 			dev->node_props.location_id);  in node_show()
456 			dev->node_props.drm_render_minor);  in node_show()
463 			dev->node_props.capability |=  in node_show()
466 			dev->node_props.capability |=  in node_show()
473 			dev->node_props.capability |=  in node_show()
477 			dev->node_props.max_engine_clk_fcompute);  in node_show()
487 				dev->node_props.capability);  in node_show()
830 		if (dev->node_props.cpu_cores_count &&  in kfd_debug_print_topology()
831 				dev->node_props.simd_count) {  in kfd_debug_print_topology()
833 				dev->node_props.device_id,  in kfd_debug_print_topology()
834 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
835 		} else if (dev->node_props.cpu_cores_count)  in kfd_debug_print_topology()
837 		else if (dev->node_props.simd_count)  in kfd_debug_print_topology()
839 				dev->node_props.device_id,  in kfd_debug_print_topology()
840 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
921 		if (dev->node_props.cpu_cores_count &&  in kfd_is_acpi_crat_invalid()
922 			dev->node_props.simd_count)  in kfd_is_acpi_crat_invalid()
1085 		if (!dev->gpu && (dev->node_props.simd_count > 0)) {  in kfd_assign_gpu()
1219 	dev->node_props.simd_arrays_per_engine =  in kfd_topology_add_device()
1222 	dev->node_props.vendor_id = gpu->pdev->vendor;  in kfd_topology_add_device()
1223 	dev->node_props.device_id = gpu->pdev->device;  in kfd_topology_add_device()
1224 	dev->node_props.location_id = PCI_DEVID(gpu->pdev->bus->number,  in kfd_topology_add_device()
1226 	dev->node_props.max_engine_clk_fcompute =  in kfd_topology_add_device()
1228 	dev->node_props.max_engine_clk_ccompute =  in kfd_topology_add_device()
1230 	dev->node_props.drm_render_minor =  in kfd_topology_add_device()
1240 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<  in kfd_topology_add_device()
1249 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<  in kfd_topology_add_device()
1255 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<  in kfd_topology_add_device()
1271 		dev->node_props.simd_count =  in kfd_topology_add_device()
1273 		dev->node_props.max_waves_per_simd = 10;  in kfd_topology_add_device()
1274 		dev->node_props.capability |= HSA_CAP_ATS_PRESENT;  in kfd_topology_add_device()