218 	if (RREG32_SOC15(VCN, 0, mmUVD_STATUS))  in vcn_v1_0_hw_fini()
335 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
344 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
346 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
348 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
351 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
359 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
361 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
382 	WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
384 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
405 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
408 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
433 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
435 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
446 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
462 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
469 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
471 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE);  in vcn_v1_0_enable_clock_gating()
473 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);  in vcn_v1_0_enable_clock_gating()
476 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
483 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
485 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
506 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
508 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
519 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
540 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_disable_static_power_gating()
541 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, UVD_PGFSM_STATUS__UVDM_UVDU_PWR_ON, 0xFFFFFF, ret);  in vcn_1_0_disable_static_power_gating()
554 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_disable_static_power_gating()
555 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0,  0xFFFFFFFF, ret);  in vcn_1_0_disable_static_power_gating()
560 	data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_1_0_disable_static_power_gating()
565 	WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_1_0_disable_static_power_gating()
575 		data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_1_0_enable_static_power_gating()
578 		WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_1_0_enable_static_power_gating()
593 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_enable_static_power_gating()
606 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFFFFF, ret);  in vcn_1_0_enable_static_power_gating()
827 	WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0);  in vcn_v1_0_stop()
838 	return (RREG32_SOC15(VCN, 0, mmUVD_STATUS) == 0x2);  in vcn_v1_0_is_idle()
846 	SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, 0x2, 0x2, ret);  in vcn_v1_0_wait_for_idle()