Lines Matching refs:vce
178 WDOORBELL32(adev->vce.ring[0].doorbell_index, 0); in vce_v4_0_mmsch_start()
179 adev->wb.wb[adev->vce.ring[0].wptr_offs] = 0; in vce_v4_0_mmsch_start()
180 adev->vce.ring[0].wptr = 0; in vce_v4_0_mmsch_start()
181 adev->vce.ring[0].wptr_old = 0; in vce_v4_0_mmsch_start()
232 ring = &adev->vce.ring[0]; in vce_v4_0_sriov_start()
257 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
260 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
264 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
267 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
270 adev->vce.gpu_addr >> 8); in vce_v4_0_sriov_start()
273 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_sriov_start()
335 ring = &adev->vce.ring[0]; in vce_v4_0_start()
343 ring = &adev->vce.ring[1]; in vce_v4_0_start()
351 ring = &adev->vce.ring[2]; in vce_v4_0_start()
408 adev->vce.num_rings = 1; in vce_v4_0_early_init()
410 adev->vce.num_rings = 3; in vce_v4_0_early_init()
426 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCE0, 167, &adev->vce.irq); in vce_v4_0_sw_init()
440 unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); in vce_v4_0_sw_init()
442 adev->vce.saved_bo = kvmalloc(size, GFP_KERNEL); in vce_v4_0_sw_init()
443 if (!adev->vce.saved_bo) in vce_v4_0_sw_init()
446 hdr = (const struct common_firmware_header *)adev->vce.fw->data; in vce_v4_0_sw_init()
448 adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].fw = adev->vce.fw; in vce_v4_0_sw_init()
458 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_sw_init()
459 ring = &adev->vce.ring[i]; in vce_v4_0_sw_init()
473 r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0); in vce_v4_0_sw_init()
499 kvfree(adev->vce.saved_bo); in vce_v4_0_sw_fini()
500 adev->vce.saved_bo = NULL; in vce_v4_0_sw_fini()
522 for (i = 0; i < adev->vce.num_rings; i++) in vce_v4_0_hw_init()
523 adev->vce.ring[i].ready = false; in vce_v4_0_hw_init()
525 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_hw_init()
526 r = amdgpu_ring_test_ring(&adev->vce.ring[i]); in vce_v4_0_hw_init()
530 adev->vce.ring[i].ready = true; in vce_v4_0_hw_init()
551 for (i = 0; i < adev->vce.num_rings; i++) in vce_v4_0_hw_fini()
552 adev->vce.ring[i].ready = false; in vce_v4_0_hw_fini()
562 if (adev->vce.vcpu_bo == NULL) in vce_v4_0_suspend()
566 unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); in vce_v4_0_suspend()
567 void *ptr = adev->vce.cpu_addr; in vce_v4_0_suspend()
569 memcpy_fromio(adev->vce.saved_bo, ptr, size); in vce_v4_0_suspend()
584 if (adev->vce.vcpu_bo == NULL) in vce_v4_0_resume()
588 unsigned size = amdgpu_bo_size(adev->vce.vcpu_bo); in vce_v4_0_resume()
589 void *ptr = adev->vce.cpu_addr; in vce_v4_0_resume()
591 memcpy_toio(ptr, adev->vce.saved_bo, size); in vce_v4_0_resume()
623 (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
625 (adev->vce.gpu_addr >> 40) & 0xff); in vce_v4_0_mc_resume()
633 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
634 …WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR1), (adev->vce.gpu_addr >> 40) & 0xf… in vce_v4_0_mc_resume()
640 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
641 …WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR2), (adev->vce.gpu_addr >> 40) & 0xf… in vce_v4_0_mc_resume()
666 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;
667 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;
723 adev->vce.srbm_soft_reset = srbm_soft_reset;
726 adev->vce.srbm_soft_reset = 0;
736 if (!adev->vce.srbm_soft_reset)
738 srbm_soft_reset = adev->vce.srbm_soft_reset;
766 if (!adev->vce.srbm_soft_reset)
779 if (!adev->vce.srbm_soft_reset)
898 if (adev->vce.harvest_config & (1 << i))
1032 amdgpu_fence_process(&adev->vce.ring[entry->src_data[0]]); in vce_v4_0_process_interrupt()
1099 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v4_0_set_ring_funcs()
1100 adev->vce.ring[i].funcs = &vce_v4_0_ring_vm_funcs; in vce_v4_0_set_ring_funcs()
1101 adev->vce.ring[i].me = i; in vce_v4_0_set_ring_funcs()
1113 adev->vce.irq.num_types = 1; in vce_v4_0_set_irq_funcs()
1114 adev->vce.irq.funcs = &vce_v4_0_irq_funcs; in vce_v4_0_set_irq_funcs()