49 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
58 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev)  in tonga_ih_enable_interrupts()  argument
65 	adev->irq.ih.enabled = true;  in tonga_ih_enable_interrupts()
75 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev)  in tonga_ih_disable_interrupts()  argument
85 	adev->irq.ih.enabled = false;  in tonga_ih_disable_interrupts()
86 	adev->irq.ih.rptr = 0;  in tonga_ih_disable_interrupts()
100 static int tonga_ih_irq_init(struct amdgpu_device *adev)  in tonga_ih_irq_init()  argument
107 	tonga_ih_disable_interrupts(adev);  in tonga_ih_irq_init()
110 	WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);  in tonga_ih_irq_init()
121 	if (adev->irq.ih.use_bus_addr)  in tonga_ih_irq_init()
122 		WREG32(mmIH_RB_BASE, adev->irq.ih.rb_dma_addr >> 8);  in tonga_ih_irq_init()
124 		WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);  in tonga_ih_irq_init()
126 	rb_bufsz = order_base_2(adev->irq.ih.ring_size / 4);  in tonga_ih_irq_init()
133 	if (adev->irq.msi_enabled)  in tonga_ih_irq_init()
139 	if (adev->irq.ih.use_bus_addr)  in tonga_ih_irq_init()
140 		wptr_off = adev->irq.ih.rb_dma_addr + (adev->irq.ih.wptr_offs * 4);  in tonga_ih_irq_init()
142 		wptr_off = adev->wb.gpu_addr + (adev->irq.ih.wptr_offs * 4);  in tonga_ih_irq_init()
151 	if (adev->irq.ih.use_doorbell) {  in tonga_ih_irq_init()
153 						 OFFSET, adev->irq.ih.doorbell_index);  in tonga_ih_irq_init()
162 	pci_set_master(adev->pdev);  in tonga_ih_irq_init()
165 	tonga_ih_enable_interrupts(adev);  in tonga_ih_irq_init()
177 static void tonga_ih_irq_disable(struct amdgpu_device *adev)  in tonga_ih_irq_disable()  argument
179 	tonga_ih_disable_interrupts(adev);  in tonga_ih_irq_disable()
196 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev)  in tonga_ih_get_wptr()  argument
200 	if (adev->irq.ih.use_bus_addr)  in tonga_ih_get_wptr()
201 		wptr = le32_to_cpu(adev->irq.ih.ring[adev->irq.ih.wptr_offs]);  in tonga_ih_get_wptr()
203 		wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);  in tonga_ih_get_wptr()
211 		dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",  in tonga_ih_get_wptr()
212 			wptr, adev->irq.ih.rptr, (wptr + 16) & adev->irq.ih.ptr_mask);  in tonga_ih_get_wptr()
213 		adev->irq.ih.rptr = (wptr + 16) & adev->irq.ih.ptr_mask;  in tonga_ih_get_wptr()
218 	return (wptr & adev->irq.ih.ptr_mask);  in tonga_ih_get_wptr()
228 static bool tonga_ih_prescreen_iv(struct amdgpu_device *adev)  in tonga_ih_prescreen_iv()  argument
230 	u32 ring_index = adev->irq.ih.rptr >> 2;  in tonga_ih_prescreen_iv()
233 	switch (le32_to_cpu(adev->irq.ih.ring[ring_index]) & 0xff) {  in tonga_ih_prescreen_iv()
236 		pasid = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]) >> 16;  in tonga_ih_prescreen_iv()
237 		if (!pasid || amdgpu_vm_pasid_fault_credit(adev, pasid))  in tonga_ih_prescreen_iv()
245 	adev->irq.ih.rptr += 16;  in tonga_ih_prescreen_iv()
257 static void tonga_ih_decode_iv(struct amdgpu_device *adev,  in tonga_ih_decode_iv()  argument
261 	u32 ring_index = adev->irq.ih.rptr >> 2;  in tonga_ih_decode_iv()
264 	dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);  in tonga_ih_decode_iv()
265 	dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);  in tonga_ih_decode_iv()
266 	dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);  in tonga_ih_decode_iv()
267 	dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);  in tonga_ih_decode_iv()
277 	adev->irq.ih.rptr += 16;  in tonga_ih_decode_iv()
287 static void tonga_ih_set_rptr(struct amdgpu_device *adev)  in tonga_ih_set_rptr()  argument
289 	if (adev->irq.ih.use_doorbell) {  in tonga_ih_set_rptr()
291 		if (adev->irq.ih.use_bus_addr)  in tonga_ih_set_rptr()
292 			adev->irq.ih.ring[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr;  in tonga_ih_set_rptr()
294 			adev->wb.wb[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr;  in tonga_ih_set_rptr()
295 		WDOORBELL32(adev->irq.ih.doorbell_index, adev->irq.ih.rptr);  in tonga_ih_set_rptr()
297 		WREG32(mmIH_RB_RPTR, adev->irq.ih.rptr);  in tonga_ih_set_rptr()
303 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_early_init()  local
306 	ret = amdgpu_irq_add_domain(adev);  in tonga_ih_early_init()
310 	tonga_ih_set_interrupt_funcs(adev);  in tonga_ih_early_init()
318 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_sw_init()  local
320 	r = amdgpu_ih_ring_init(adev, 64 * 1024, true);  in tonga_ih_sw_init()
324 	adev->irq.ih.use_doorbell = true;  in tonga_ih_sw_init()
325 	adev->irq.ih.doorbell_index = AMDGPU_DOORBELL_IH;  in tonga_ih_sw_init()
327 	r = amdgpu_irq_init(adev);  in tonga_ih_sw_init()
334 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_sw_fini()  local
336 	amdgpu_irq_fini(adev);  in tonga_ih_sw_fini()
337 	amdgpu_ih_ring_fini(adev);  in tonga_ih_sw_fini()
338 	amdgpu_irq_remove_domain(adev);  in tonga_ih_sw_fini()
346 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_hw_init()  local
348 	r = tonga_ih_irq_init(adev);  in tonga_ih_hw_init()
357 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_hw_fini()  local
359 	tonga_ih_irq_disable(adev);  in tonga_ih_hw_fini()
366 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_suspend()  local
368 	return tonga_ih_hw_fini(adev);  in tonga_ih_suspend()
373 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_resume()  local
375 	return tonga_ih_hw_init(adev);  in tonga_ih_resume()
380 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_is_idle()  local
393 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_wait_for_idle()  local
395 	for (i = 0; i < adev->usec_timeout; i++) {  in tonga_ih_wait_for_idle()
407 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_check_soft_reset()  local
416 		adev->irq.srbm_soft_reset = srbm_soft_reset;  in tonga_ih_check_soft_reset()
419 		adev->irq.srbm_soft_reset = 0;  in tonga_ih_check_soft_reset()
426 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_pre_soft_reset()  local
428 	if (!adev->irq.srbm_soft_reset)  in tonga_ih_pre_soft_reset()
431 	return tonga_ih_hw_fini(adev);  in tonga_ih_pre_soft_reset()
436 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_post_soft_reset()  local
438 	if (!adev->irq.srbm_soft_reset)  in tonga_ih_post_soft_reset()
441 	return tonga_ih_hw_init(adev);  in tonga_ih_post_soft_reset()
446 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;  in tonga_ih_soft_reset()  local
449 	if (!adev->irq.srbm_soft_reset)  in tonga_ih_soft_reset()
451 	srbm_soft_reset = adev->irq.srbm_soft_reset;  in tonga_ih_soft_reset()
458 		dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);  in tonga_ih_soft_reset()
514 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev)  in tonga_ih_set_interrupt_funcs()  argument
516 	if (adev->irq.ih_funcs == NULL)  in tonga_ih_set_interrupt_funcs()
517 		adev->irq.ih_funcs = &tonga_ih_funcs;  in tonga_ih_set_interrupt_funcs()