2285 						  si_pi->sram_end);  in si_populate_smc_tdp_limits()
2302 							  si_pi->sram_end);  in si_populate_smc_tdp_limits()
2334 						  si_pi->sram_end);  in si_populate_smc_tdp_limits_2()
2624 					  si_pi->sram_end);  in si_initialize_smc_dte_tables()
2817 					  si_pi->sram_end);  in si_initialize_smc_cac_tables()
3005 						  si_pi->sram_end);  in si_init_smc_spll_table()
3648 					     si_pi->sram_end);
3659 					      value, si_pi->sram_end);  in si_write_smc_soft_register()
3945 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3954 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3963 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3972 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3981 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3990 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
3999 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4008 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4017 					    &tmp, si_pi->sram_end);  in si_process_firmware_header()
4351 	return amdgpu_si_load_smc_ucode(adev, si_pi->sram_end);  in si_upload_firmware()
4696 					    &tmp, si_pi->sram_end);  in si_init_arb_table_index()
4704 					      tmp, si_pi->sram_end);  in si_init_arb_table_index()
4725 					    &tmp, si_pi->sram_end);  in si_force_switch_to_arb_f0()
4801 						  si_pi->sram_end);  in si_do_program_memory_timing_parameters()
5144 					  si_pi->sram_end);  in si_program_ulv_memory_timing_parameters()
5240 					   si_pi->sram_end);  in si_init_smc_table()
5750 					   state_size, si_pi->sram_end);  in si_upload_sw_state()
5770 							  state_size, si_pi->sram_end);  in si_upload_ulv_state()
6139 					   sizeof(SMC_SIslands_MCRegisters), si_pi->sram_end);  in si_populate_mc_reg_table()
6159 					   si_pi->sram_end);  in si_upload_mc_reg_table()
6521 					  si_pi->sram_end);  in si_thermal_setup_fan_table()
7443 	si_pi->sram_end = SMC_RAM_END;  in si_dpm_init()