Lines Matching refs:ib
381 struct amdgpu_ib *ib, in sdma_v4_0_ring_emit_ib() argument
390 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v4_0_ring_emit_ib()
391 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v4_0_ring_emit_ib()
392 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
984 struct amdgpu_ib ib; in sdma_v4_0_ring_test_ib() local
1000 memset(&ib, 0, sizeof(ib)); in sdma_v4_0_ring_test_ib()
1001 r = amdgpu_ib_get(adev, NULL, 256, &ib); in sdma_v4_0_ring_test_ib()
1007 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_ring_test_ib()
1009 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1010 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1011 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0); in sdma_v4_0_ring_test_ib()
1012 ib.ptr[4] = 0xDEADBEEF; in sdma_v4_0_ring_test_ib()
1013 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1014 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1015 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1016 ib.length_dw = 8; in sdma_v4_0_ring_test_ib()
1018 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v4_0_ring_test_ib()
1040 amdgpu_ib_free(adev, &ib, NULL); in sdma_v4_0_ring_test_ib()
1058 static void sdma_v4_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v4_0_vm_copy_pte() argument
1064 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_vm_copy_pte()
1066 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v4_0_vm_copy_pte()
1067 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_vm_copy_pte()
1068 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v4_0_vm_copy_pte()
1069 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v4_0_vm_copy_pte()
1070 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1071 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1087 static void sdma_v4_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v4_0_vm_write_pte() argument
1093 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_vm_write_pte()
1095 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_write_pte()
1096 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_write_pte()
1097 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v4_0_vm_write_pte()
1099 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v4_0_vm_write_pte()
1100 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v4_0_vm_write_pte()
1117 static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib, in sdma_v4_0_vm_set_pte_pde() argument
1123 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE); in sdma_v4_0_vm_set_pte_pde()
1124 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v4_0_vm_set_pte_pde()
1125 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_set_pte_pde()
1126 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v4_0_vm_set_pte_pde()
1127 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v4_0_vm_set_pte_pde()
1128 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v4_0_vm_set_pte_pde()
1129 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v4_0_vm_set_pte_pde()
1130 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v4_0_vm_set_pte_pde()
1131 ib->ptr[ib->length_dw++] = 0; in sdma_v4_0_vm_set_pte_pde()
1132 ib->ptr[ib->length_dw++] = count - 1; /* number of entries */ in sdma_v4_0_vm_set_pte_pde()
1141 static void sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v4_0_ring_pad_ib() argument
1147 pad_count = (8 - (ib->length_dw & 0x7)) % 8; in sdma_v4_0_ring_pad_ib()
1150 ib->ptr[ib->length_dw++] = in sdma_v4_0_ring_pad_ib()
1154 ib->ptr[ib->length_dw++] = in sdma_v4_0_ring_pad_ib()
1691 static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v4_0_emit_copy_buffer() argument
1696 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_emit_copy_buffer()
1698 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v4_0_emit_copy_buffer()
1699 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_emit_copy_buffer()
1700 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v4_0_emit_copy_buffer()
1701 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v4_0_emit_copy_buffer()
1702 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v4_0_emit_copy_buffer()
1703 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v4_0_emit_copy_buffer()
1716 static void sdma_v4_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v4_0_emit_fill_buffer() argument
1721 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v4_0_emit_fill_buffer()
1722 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v4_0_emit_fill_buffer()
1723 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v4_0_emit_fill_buffer()
1724 ib->ptr[ib->length_dw++] = src_data; in sdma_v4_0_emit_fill_buffer()
1725 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v4_0_emit_fill_buffer()