423 				   struct amdgpu_ib *ib,  in sdma_v3_0_ring_emit_ib()  argument
432 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v3_0_ring_emit_ib()
433 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v3_0_ring_emit_ib()
434 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v3_0_ring_emit_ib()
922 	struct amdgpu_ib ib;  in sdma_v3_0_ring_test_ib()  local
938 	memset(&ib, 0, sizeof(ib));  in sdma_v3_0_ring_test_ib()
939 	r = amdgpu_ib_get(adev, NULL, 256, &ib);  in sdma_v3_0_ring_test_ib()
945 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_ring_test_ib()
947 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v3_0_ring_test_ib()
948 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v3_0_ring_test_ib()
949 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1);  in sdma_v3_0_ring_test_ib()
950 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v3_0_ring_test_ib()
951 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
952 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
953 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
954 	ib.length_dw = 8;  in sdma_v3_0_ring_test_ib()
956 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v3_0_ring_test_ib()
978 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v3_0_ring_test_ib()
995 static void sdma_v3_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v3_0_vm_copy_pte()  argument
1001 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v3_0_vm_copy_pte()
1003 	ib->ptr[ib->length_dw++] = bytes;  in sdma_v3_0_vm_copy_pte()
1004 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v3_0_vm_copy_pte()
1005 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v3_0_vm_copy_pte()
1006 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v3_0_vm_copy_pte()
1007 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v3_0_vm_copy_pte()
1008 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_copy_pte()
1022 static void sdma_v3_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v3_0_vm_write_pte()  argument
1028 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_vm_write_pte()
1030 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v3_0_vm_write_pte()
1031 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_write_pte()
1032 	ib->ptr[ib->length_dw++] = ndw;  in sdma_v3_0_vm_write_pte()
1034 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v3_0_vm_write_pte()
1035 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v3_0_vm_write_pte()
1052 static void sdma_v3_0_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v3_0_vm_set_pte_pde()  argument
1057 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);  in sdma_v3_0_vm_set_pte_pde()
1058 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v3_0_vm_set_pte_pde()
1059 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_set_pte_pde()
1060 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v3_0_vm_set_pte_pde()
1061 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v3_0_vm_set_pte_pde()
1062 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v3_0_vm_set_pte_pde()
1063 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v3_0_vm_set_pte_pde()
1064 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v3_0_vm_set_pte_pde()
1065 	ib->ptr[ib->length_dw++] = 0;  in sdma_v3_0_vm_set_pte_pde()
1066 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in sdma_v3_0_vm_set_pte_pde()
1075 static void sdma_v3_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v3_0_ring_pad_ib()  argument
1081 	pad_count = (8 - (ib->length_dw & 0x7)) % 8;  in sdma_v3_0_ring_pad_ib()
1084 			ib->ptr[ib->length_dw++] =  in sdma_v3_0_ring_pad_ib()
1088 			ib->ptr[ib->length_dw++] =  in sdma_v3_0_ring_pad_ib()
1690 static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v3_0_emit_copy_buffer()  argument
1695 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v3_0_emit_copy_buffer()
1697 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v3_0_emit_copy_buffer()
1698 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v3_0_emit_copy_buffer()
1699 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v3_0_emit_copy_buffer()
1700 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v3_0_emit_copy_buffer()
1701 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v3_0_emit_copy_buffer()
1702 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v3_0_emit_copy_buffer()
1715 static void sdma_v3_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v3_0_emit_fill_buffer()  argument
1720 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v3_0_emit_fill_buffer()
1721 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v3_0_emit_fill_buffer()
1722 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v3_0_emit_fill_buffer()
1723 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v3_0_emit_fill_buffer()
1724 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v3_0_emit_fill_buffer()