248 				   struct amdgpu_ib *ib,  in sdma_v2_4_ring_emit_ib()  argument
257 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v2_4_ring_emit_ib()
258 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v2_4_ring_emit_ib()
259 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v2_4_ring_emit_ib()
649 	struct amdgpu_ib ib;  in sdma_v2_4_ring_test_ib()  local
665 	memset(&ib, 0, sizeof(ib));  in sdma_v2_4_ring_test_ib()
666 	r = amdgpu_ib_get(adev, NULL, 256, &ib);  in sdma_v2_4_ring_test_ib()
672 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v2_4_ring_test_ib()
674 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v2_4_ring_test_ib()
675 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v2_4_ring_test_ib()
676 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1);  in sdma_v2_4_ring_test_ib()
677 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v2_4_ring_test_ib()
678 	ib.ptr[5] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
679 	ib.ptr[6] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
680 	ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
681 	ib.length_dw = 8;  in sdma_v2_4_ring_test_ib()
683 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v2_4_ring_test_ib()
706 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v2_4_ring_test_ib()
723 static void sdma_v2_4_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v2_4_vm_copy_pte()  argument
729 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v2_4_vm_copy_pte()
731 	ib->ptr[ib->length_dw++] = bytes;  in sdma_v2_4_vm_copy_pte()
732 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v2_4_vm_copy_pte()
733 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v2_4_vm_copy_pte()
734 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v2_4_vm_copy_pte()
735 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v2_4_vm_copy_pte()
736 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_copy_pte()
750 static void sdma_v2_4_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v2_4_vm_write_pte()  argument
756 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v2_4_vm_write_pte()
758 	ib->ptr[ib->length_dw++] = pe;  in sdma_v2_4_vm_write_pte()
759 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_write_pte()
760 	ib->ptr[ib->length_dw++] = ndw;  in sdma_v2_4_vm_write_pte()
762 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v2_4_vm_write_pte()
763 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v2_4_vm_write_pte()
780 static void sdma_v2_4_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v2_4_vm_set_pte_pde()  argument
785 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);  in sdma_v2_4_vm_set_pte_pde()
786 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v2_4_vm_set_pte_pde()
787 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_set_pte_pde()
788 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v2_4_vm_set_pte_pde()
789 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v2_4_vm_set_pte_pde()
790 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v2_4_vm_set_pte_pde()
791 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v2_4_vm_set_pte_pde()
792 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v2_4_vm_set_pte_pde()
793 	ib->ptr[ib->length_dw++] = 0;  in sdma_v2_4_vm_set_pte_pde()
794 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in sdma_v2_4_vm_set_pte_pde()
803 static void sdma_v2_4_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v2_4_ring_pad_ib()  argument
809 	pad_count = (8 - (ib->length_dw & 0x7)) % 8;  in sdma_v2_4_ring_pad_ib()
812 			ib->ptr[ib->length_dw++] =  in sdma_v2_4_ring_pad_ib()
816 			ib->ptr[ib->length_dw++] =  in sdma_v2_4_ring_pad_ib()
1250 static void sdma_v2_4_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v2_4_emit_copy_buffer()  argument
1255 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v2_4_emit_copy_buffer()
1257 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v2_4_emit_copy_buffer()
1258 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v2_4_emit_copy_buffer()
1259 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v2_4_emit_copy_buffer()
1260 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v2_4_emit_copy_buffer()
1261 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v2_4_emit_copy_buffer()
1262 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v2_4_emit_copy_buffer()
1275 static void sdma_v2_4_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v2_4_emit_fill_buffer()  argument
1280 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v2_4_emit_fill_buffer()
1281 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v2_4_emit_fill_buffer()
1282 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v2_4_emit_fill_buffer()
1283 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v2_4_emit_fill_buffer()
1284 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v2_4_emit_fill_buffer()