155 	err = request_firmware(&adev->gmc.fw, fw_name, adev->dev);  in gmc_v7_0_init_microcode()
158 	err = amdgpu_ucode_validate(adev->gmc.fw);  in gmc_v7_0_init_microcode()
163 		release_firmware(adev->gmc.fw);  in gmc_v7_0_init_microcode()
164 		adev->gmc.fw = NULL;  in gmc_v7_0_init_microcode()
185 	if (!adev->gmc.fw)  in gmc_v7_0_mc_load_microcode()
188 	hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data;  in gmc_v7_0_mc_load_microcode()
191 	adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);  in gmc_v7_0_mc_load_microcode()
194 		(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));  in gmc_v7_0_mc_load_microcode()
197 		(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));  in gmc_v7_0_mc_load_microcode()
244 	amdgpu_device_vram_location(adev, &adev->gmc, base);  in gmc_v7_0_vram_gtt_location()
287 	       adev->gmc.vram_start >> 12);  in gmc_v7_0_mc_program()
289 	       adev->gmc.vram_end >> 12);  in gmc_v7_0_mc_program()
322 	adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev);  in gmc_v7_0_mc_init()
323 	if (!adev->gmc.vram_width) {  in gmc_v7_0_mc_init()
365 		adev->gmc.vram_width = numchan * chansize;  in gmc_v7_0_mc_init()
368 	adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
369 	adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v7_0_mc_init()
376 	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);  in gmc_v7_0_mc_init()
377 	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);  in gmc_v7_0_mc_init()
381 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;  in gmc_v7_0_mc_init()
382 		adev->gmc.aper_size = adev->gmc.real_vram_size;  in gmc_v7_0_mc_init()
387 	adev->gmc.visible_vram_size = adev->gmc.aper_size;  in gmc_v7_0_mc_init()
388 	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)  in gmc_v7_0_mc_init()
389 		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;  in gmc_v7_0_mc_init()
396 			adev->gmc.gart_size = 256ULL << 20;  in gmc_v7_0_mc_init()
404 			adev->gmc.gart_size = 1024ULL << 20;  in gmc_v7_0_mc_init()
409 		adev->gmc.gart_size = (u64)amdgpu_gart_size << 20;  in gmc_v7_0_mc_init()
412 	gmc_v7_0_vram_gtt_location(adev, &adev->gmc);  in gmc_v7_0_mc_init()
544 	if (enable && !adev->gmc.prt_warning) {  in gmc_v7_0_set_prt()
546 		adev->gmc.prt_warning = true;  in gmc_v7_0_set_prt()
643 	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);  in gmc_v7_0_gart_enable()
644 	WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);  in gmc_v7_0_gart_enable()
698 		 (unsigned)(adev->gmc.gart_size >> 20),  in gmc_v7_0_gart_enable()
933 	adev->gmc.shared_aperture_start = 0x2000000000000000ULL;  in gmc_v7_0_early_init()
934 	adev->gmc.shared_aperture_end =  in gmc_v7_0_early_init()
935 		adev->gmc.shared_aperture_start + (4ULL << 30) - 1;  in gmc_v7_0_early_init()
936 	adev->gmc.private_aperture_start =  in gmc_v7_0_early_init()
937 		adev->gmc.shared_aperture_end + 1;  in gmc_v7_0_early_init()
938 	adev->gmc.private_aperture_end =  in gmc_v7_0_early_init()
939 		adev->gmc.private_aperture_start + (4ULL << 30) - 1;  in gmc_v7_0_early_init()
951 		return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);  in gmc_v7_0_late_init()
970 	if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))  in gmc_v7_0_get_vbios_fb_size()
982 		adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;  in gmc_v7_0_sw_init()
986 		adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp);  in gmc_v7_0_sw_init()
989 …d_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault);  in gmc_v7_0_sw_init()
993 …d_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault);  in gmc_v7_0_sw_init()
1007 	adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */  in gmc_v7_0_sw_init()
1039 	adev->gmc.stolen_size = gmc_v7_0_get_vbios_fb_size(adev);  in gmc_v7_0_sw_init()
1069 	adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info),  in gmc_v7_0_sw_init()
1071 	if (!adev->gmc.vm_fault_info)  in gmc_v7_0_sw_init()
1073 	atomic_set(&adev->gmc.vm_fault_info_updated, 0);  in gmc_v7_0_sw_init()
1084 	kfree(adev->gmc.vm_fault_info);  in gmc_v7_0_sw_fini()
1088 	release_firmware(adev->gmc.fw);  in gmc_v7_0_sw_fini()
1089 	adev->gmc.fw = NULL;  in gmc_v7_0_sw_fini()
1122 	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);  in gmc_v7_0_hw_fini()
1303 		&& !atomic_read(&adev->gmc.vm_fault_info_updated)) {  in gmc_v7_0_process_interrupt()
1304 		struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info;  in gmc_v7_0_process_interrupt()
1320 		atomic_set(&adev->gmc.vm_fault_info_updated, 1);  in gmc_v7_0_process_interrupt()
1386 	if (adev->gmc.gmc_funcs == NULL)  in gmc_v7_0_set_gmc_funcs()
1387 		adev->gmc.gmc_funcs = &gmc_v7_0_gmc_funcs;  in gmc_v7_0_set_gmc_funcs()
1392 	adev->gmc.vm_fault.num_types = 1;  in gmc_v7_0_set_irq_funcs()
1393 	adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs;  in gmc_v7_0_set_irq_funcs()