Lines Matching refs:mec
1026 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v9_0_mec_fini()
1027 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v9_0_mec_fini()
1041 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v9_0_mec_init()
1049 &adev->gfx.mec.hpd_eop_obj, in gfx_v9_0_mec_init()
1050 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v9_0_mec_init()
1058 memset(hpd, 0, adev->gfx.mec.hpd_eop_obj->tbo.mem.size); in gfx_v9_0_mec_init()
1060 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v9_0_mec_init()
1061 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v9_0_mec_init()
1072 &adev->gfx.mec.mec_fw_obj, in gfx_v9_0_mec_init()
1073 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v9_0_mec_init()
1083 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v9_0_mec_init()
1084 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); in gfx_v9_0_mec_init()
1447 int mec, int pipe, int queue) in gfx_v9_0_compute_ring_init() argument
1456 ring->me = mec + 1; in gfx_v9_0_compute_ring_init()
1463 ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr in gfx_v9_0_compute_ring_init()
1468 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_0_compute_ring_init()
1493 adev->gfx.mec.num_mec = 2; in gfx_v9_0_sw_init()
1496 adev->gfx.mec.num_mec = 1; in gfx_v9_0_sw_init()
1500 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init()
1501 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_0_sw_init()
1565 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v9_0_sw_init()
1566 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v9_0_sw_init()
1567 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_0_sw_init()
2577 adev->gfx.mec.mec_fw_gpu_addr & 0xFFFFF000); in gfx_v9_0_cp_compute_load_microcode()
2579 upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr)); in gfx_v9_0_cp_compute_load_microcode()
2618 if (!test_bit(i, adev->gfx.mec.queue_bitmap)) in gfx_v9_0_kiq_kcq_enable()
2993 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kiq_init_queue()
2994 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kiq_init_queue()
3016 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kiq_init_queue()
3017 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kiq_init_queue()
3039 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kcq_init_queue()
3040 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kcq_init_queue()
3043 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kcq_init_queue()
3044 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); in gfx_v9_0_kcq_init_queue()
4059 pipe_num = ring->me * adev->gfx.mec.num_pipe_per_mec + ring->pipe; in gfx_v9_0_ring_set_pipe_percent()