Lines Matching refs:kiq
1485 struct amdgpu_kiq *kiq; in gfx_v9_0_sw_init() local
1504 …_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_IB2_INTERRUPT_PKT, &adev->gfx.kiq.irq); in gfx_v9_0_sw_init()
1588 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init()
1589 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v9_0_sw_init()
1646 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq); in gfx_v9_0_sw_fini()
2548 adev->gfx.kiq.ring.ready = false; in gfx_v9_0_cp_compute_enable()
2612 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_kcq_enable()
3063 ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_resume()
3135 ring = &adev->gfx.kiq.ring; in gfx_v9_0_cp_resume()
3253 gfx_v9_0_kcq_disable(&adev->gfx.kiq.ring, &adev->gfx.compute_ring[i]); in gfx_v9_0_hw_fini()
3271 soc15_grbm_select(adev, adev->gfx.kiq.ring.me, in gfx_v9_0_hw_fini()
3272 adev->gfx.kiq.ring.pipe, in gfx_v9_0_hw_fini()
3273 adev->gfx.kiq.ring.queue, 0); in gfx_v9_0_hw_fini()
3274 gfx_v9_0_kiq_fini_register(&adev->gfx.kiq.ring); in gfx_v9_0_hw_fini()
4562 struct amdgpu_ring *ring = &(adev->gfx.kiq.ring); in gfx_v9_0_kiq_set_interrupt_state()
4606 struct amdgpu_ring *ring = &(adev->gfx.kiq.ring); in gfx_v9_0_kiq_irq()
4756 adev->gfx.kiq.ring.funcs = &gfx_v9_0_ring_funcs_kiq; in gfx_v9_0_set_ring_funcs()
4796 adev->gfx.kiq.irq.num_types = AMDGPU_CP_KIQ_IRQ_LAST; in gfx_v9_0_set_irq_funcs()
4797 adev->gfx.kiq.irq.funcs = &gfx_v9_0_kiq_irq_funcs; in gfx_v9_0_set_irq_funcs()