307 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_write_data_to_reg()
321 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v9_0_wait_reg_mem()
359 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v9_0_ring_test_ring()
407 	ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);  in gfx_v9_0_ring_test_ib()
779 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_get_csb_buffer()
782 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_0_get_csb_buffer()
790 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in gfx_v9_0_get_csb_buffer()
801 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_get_csb_buffer()
804 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v9_0_get_csb_buffer()
1427 	amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));  in gfx_v9_0_ngg_en()
2424 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_cp_gfx_start()
2427 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_0_cp_gfx_start()
2435 				       PACKET3(PACKET3_SET_CONTEXT_REG,  in gfx_v9_0_cp_gfx_start()
2445 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v9_0_cp_gfx_start()
2448 	amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v9_0_cp_gfx_start()
2451 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in gfx_v9_0_cp_gfx_start()
2456 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1));  in gfx_v9_0_cp_gfx_start()
2647 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));  in gfx_v9_0_kiq_kcq_enable()
2661 		amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));  in gfx_v9_0_kiq_kcq_enable()
2680 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v9_0_kiq_kcq_enable()
3210 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));  in gfx_v9_0_kcq_disable()
3221 	amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v9_0_kcq_disable()
3936 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in gfx_v9_0_ring_emit_ib_gfx()
3938 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in gfx_v9_0_ring_emit_ib_gfx()
3966         amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));  in gfx_v9_0_ring_emit_ib_compute()
3985 	amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));  in gfx_v9_0_ring_emit_fence()
4030 		amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in gfx_v9_0_ring_emit_vm_flush()
4173 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_fence_kiq()
4182 		amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_fence_kiq()
4193 	amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v9_ring_emit_sb()
4206 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v9_0_ring_emit_ce_meta()
4228 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));  in gfx_v9_0_ring_emit_de_meta()
4240 	amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));  in gfx_v9_0_ring_emit_tmz()
4273 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v9_ring_emit_cntxcntl()
4281 	amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));  in gfx_v9_0_ring_emit_init_cond_exec()
4307 	amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));  in gfx_v9_0_ring_emit_rreg()
4335 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v9_0_ring_emit_wreg()
4639 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
4689 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
4724 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),