4215 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad…  in wave_read_ind()  argument
4219 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_ind()
4225 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,  in wave_read_regs()  argument
4231 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_regs()
4240 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3…  in gfx_v7_0_read_wave_data()  argument
4244 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);  in gfx_v7_0_read_wave_data()
4245 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);  in gfx_v7_0_read_wave_data()
4246 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);  in gfx_v7_0_read_wave_data()
4247 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);  in gfx_v7_0_read_wave_data()
4248 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);  in gfx_v7_0_read_wave_data()
4249 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);  in gfx_v7_0_read_wave_data()
4250 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);  in gfx_v7_0_read_wave_data()
4251 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);  in gfx_v7_0_read_wave_data()
4252 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);  in gfx_v7_0_read_wave_data()
4253 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);  in gfx_v7_0_read_wave_data()
4254 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);  in gfx_v7_0_read_wave_data()
4255 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);  in gfx_v7_0_read_wave_data()
4256 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);  in gfx_v7_0_read_wave_data()
4257 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);  in gfx_v7_0_read_wave_data()
4258 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);  in gfx_v7_0_read_wave_data()
4259 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);  in gfx_v7_0_read_wave_data()
4260 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);  in gfx_v7_0_read_wave_data()
4261 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);  in gfx_v7_0_read_wave_data()
4264 static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,  in gfx_v7_0_read_wave_sgprs()  argument
4269 		adev, simd, wave, 0,  in gfx_v7_0_read_wave_sgprs()