2078 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in gfx_v7_0_ring_test_ring()
2128 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v7_0_ring_emit_hdp_flush()
2141 	amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));  in gfx_v7_0_ring_emit_vgt_flush()
2145 	amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));  in gfx_v7_0_ring_emit_vgt_flush()
2167 	amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in gfx_v7_0_ring_emit_fence_gfx()
2179 	amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in gfx_v7_0_ring_emit_fence_gfx()
2208 	amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));  in gfx_v7_0_ring_emit_fence_compute()
2243 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v7_0_ring_emit_ib_gfx()
2248 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in gfx_v7_0_ring_emit_ib_gfx()
2250 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in gfx_v7_0_ring_emit_ib_gfx()
2270 	amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));  in gfx_v7_0_ring_emit_ib_compute()
2295 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v7_ring_emit_cntxcntl()
2330 	ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);  in gfx_v7_0_ring_test_ib()
2509 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in gfx_v7_0_cp_gfx_start()
2515 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v7_0_cp_gfx_start()
2518 	amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v7_0_cp_gfx_start()
2526 						  PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in gfx_v7_0_cp_gfx_start()
2534 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in gfx_v7_0_cp_gfx_start()
2539 	amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v7_0_cp_gfx_start()
2542 	amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v7_0_cp_gfx_start()
2545 	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in gfx_v7_0_cp_gfx_start()
3188 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v7_0_ring_emit_pipeline_sync()
3200 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v7_0_ring_emit_pipeline_sync()
3202 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v7_0_ring_emit_pipeline_sync()
3229 	amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in gfx_v7_0_ring_emit_vm_flush()
3242 		amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in gfx_v7_0_ring_emit_vm_flush()
3246 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v7_0_ring_emit_vm_flush()
3248 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in gfx_v7_0_ring_emit_vm_flush()
3258 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v7_0_ring_emit_wreg()
4057 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v7_0_get_csb_buffer()
4060 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in gfx_v7_0_get_csb_buffer()
4068 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in gfx_v7_0_get_csb_buffer()
4078 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in gfx_v7_0_get_csb_buffer()
4104 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in gfx_v7_0_get_csb_buffer()
4107 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in gfx_v7_0_get_csb_buffer()
4183 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v7_0_ring_emit_gds_switch()
4191 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v7_0_ring_emit_gds_switch()
4199 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v7_0_ring_emit_gds_switch()
4207 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in gfx_v7_0_ring_emit_gds_switch()
5065 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),
5096 	.nop = PACKET3(PACKET3_NOP, 0x3FFF),