3006 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad…  in wave_read_ind()  argument
3010 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_ind()
3016 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,  in wave_read_regs()  argument
3022 		(simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |  in wave_read_regs()
3031 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3…  in gfx_v6_0_read_wave_data()  argument
3035 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);  in gfx_v6_0_read_wave_data()
3036 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);  in gfx_v6_0_read_wave_data()
3037 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);  in gfx_v6_0_read_wave_data()
3038 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);  in gfx_v6_0_read_wave_data()
3039 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);  in gfx_v6_0_read_wave_data()
3040 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);  in gfx_v6_0_read_wave_data()
3041 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);  in gfx_v6_0_read_wave_data()
3042 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);  in gfx_v6_0_read_wave_data()
3043 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);  in gfx_v6_0_read_wave_data()
3044 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);  in gfx_v6_0_read_wave_data()
3045 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);  in gfx_v6_0_read_wave_data()
3046 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);  in gfx_v6_0_read_wave_data()
3047 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);  in gfx_v6_0_read_wave_data()
3048 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);  in gfx_v6_0_read_wave_data()
3049 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);  in gfx_v6_0_read_wave_data()
3050 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);  in gfx_v6_0_read_wave_data()
3051 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);  in gfx_v6_0_read_wave_data()
3052 	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);  in gfx_v6_0_read_wave_data()
3055 static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,  in gfx_v6_0_read_wave_sgprs()  argument
3060 		adev, simd, wave, 0,  in gfx_v6_0_read_wave_sgprs()