265 union power_info {  union
310 	union power_info *power_info;  in amdgpu_get_platform_caps()  local
318 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_get_platform_caps()
320 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
321 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
322 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
340 	union power_info *power_info;  in amdgpu_parse_extended_power_table()  local
351 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_parse_extended_power_table()
354 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
356 		if (power_info->pplib3.usFanTableOffset) {  in amdgpu_parse_extended_power_table()
358 						      le16_to_cpu(power_info->pplib3.usFanTableOffset));  in amdgpu_parse_extended_power_table()
384 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
386 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {  in amdgpu_parse_extended_power_table()
389 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));  in amdgpu_parse_extended_power_table()
397 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
400 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
408 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
411 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
419 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
422 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
430 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {  in amdgpu_parse_extended_power_table()
434 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));  in amdgpu_parse_extended_power_table()
448 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {  in amdgpu_parse_extended_power_table()
452 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));  in amdgpu_parse_extended_power_table()
481 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
483 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
484 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
486 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
492 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
493 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
494 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
495 		if (power_info->pplib5.usCACLeakageTableOffset) {  in amdgpu_parse_extended_power_table()
499 				 le16_to_cpu(power_info->pplib5.usCACLeakageTableOffset));  in amdgpu_parse_extended_power_table()
530 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
534 			 le16_to_cpu(power_info->pplib3.usExtendendedHeaderOffset));  in amdgpu_parse_extended_power_table()