Lines Matching defs:amdgpu_nbio_funcs

1262 struct amdgpu_nbio_funcs {  struct
1263 	const struct nbio_hdp_flush_reg *hdp_flush_reg;
1264 	u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
1265 	u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
1266 	u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
1267 	u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
1268 	u32 (*get_rev_id)(struct amdgpu_device *adev);
1269 	void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
1270 	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
1271 	u32 (*get_memsize)(struct amdgpu_device *adev);
1272 	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
1274 	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
1276 	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
1278 	void (*ih_doorbell_range)(struct amdgpu_device *adev,
1280 	void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
1282 	void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
1284 	void (*get_clockgating_state)(struct amdgpu_device *adev,
1286 	void (*ih_control)(struct amdgpu_device *adev);
1287 	void (*init_registers)(struct amdgpu_device *adev);
1288 	void (*detect_hw_virt)(struct amdgpu_device *adev);