51 	unsigned long bank_offset;  in xgene_gpio_get()  local
54 	bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_get()
56 	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));  in xgene_gpio_get()
62 	unsigned long bank_offset;  in __xgene_gpio_set()  local
65 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in __xgene_gpio_set()
68 	setval = ioread32(chip->base + bank_offset);  in __xgene_gpio_set()
73 	iowrite32(setval, chip->base + bank_offset);  in __xgene_gpio_set()
89 	unsigned long bank_offset, bit_offset;  in xgene_gpio_get_direction()  local
91 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_get_direction()
94 	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));  in xgene_gpio_get_direction()
100 	unsigned long flags, bank_offset;  in xgene_gpio_dir_in()  local
103 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_dir_in()
108 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_in()
110 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_in()
121 	unsigned long flags, bank_offset;  in xgene_gpio_dir_out()  local
124 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_dir_out()
129 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_out()
131 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_out()
142 	unsigned long bank_offset;  in xgene_gpio_suspend()  local
146 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_suspend()
147 		gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);  in xgene_gpio_suspend()
155 	unsigned long bank_offset;  in xgene_gpio_resume()  local
159 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_resume()
160 		iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);  in xgene_gpio_resume()