19 struct sa1100_gpio_chip {  struct
29 #define sa1100_gpio_chip(x) container_of(x, struct sa1100_gpio_chip, chip)  argument
44 	return readl_relaxed(sa1100_gpio_chip(chip)->membase + R_GPLR) &  in sa1100_gpio_get()
52 	writel_relaxed(BIT(offset), sa1100_gpio_chip(chip)->membase + reg);  in sa1100_gpio_set()
57 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_get_direction()
64 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_input()
76 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_output()
89 	return sa1100_gpio_chip(chip)->irqbase + offset;  in sa1100_to_irq()
92 static struct sa1100_gpio_chip sa1100_gpio_chip = {  variable
113 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)  in sa1100_update_edge_regs()
127 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_type()
155 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_ack()
162 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_mask()
172 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_unmask()
182 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_wake()
208 	struct sa1100_gpio_chip *sgc = d->host_data;  in sa1100_gpio_irqdomain_map()
231 	struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);  in sa1100_gpio_handler()
257 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_gpio_suspend()
276 	sa1100_update_edge_regs(&sa1100_gpio_chip);  in sa1100_gpio_resume()
311 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_init_gpio()
319 	gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);  in sa1100_init_gpio()