254 static const struct aspeed_gpio_bank *to_bank(unsigned int offset)  in to_bank()  argument
256 	unsigned int bank = GPIO_BANK(offset);  in to_bank()
268 		struct aspeed_gpio *gpio, unsigned int offset)  in find_bank_props()  argument
273 		if (props->bank == GPIO_BANK(offset))  in find_bank_props()
281 static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset)  in have_gpio()  argument
283 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_gpio()
284 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in have_gpio()
285 	unsigned int group = GPIO_OFFSET(offset) / 8;  in have_gpio()
288 		(!props || ((props->input | props->output) & GPIO_BIT(offset)));  in have_gpio()
291 static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset)  in have_input()  argument
293 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_input()
295 	return !props || (props->input & GPIO_BIT(offset));  in have_input()
301 static inline bool have_output(struct aspeed_gpio *gpio, unsigned int offset)  in have_output()  argument
303 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_output()
305 	return !props || (props->output & GPIO_BIT(offset));  in have_output()
341 				      unsigned int offset)  in aspeed_gpio_copro_request()  argument
343 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_copro_request()
347 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_request()
356 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3, GPIO_CMDSRC_ARM);  in aspeed_gpio_copro_request()
359 	gpio->dcache[GPIO_BANK(offset)] = ioread32(bank_reg(gpio, bank, reg_rdata));  in aspeed_gpio_copro_request()
365 				      unsigned int offset)  in aspeed_gpio_copro_release()  argument
367 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_copro_release()
371 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_release()
377 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3,  in aspeed_gpio_copro_release()
384 static int aspeed_gpio_get(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_get()  argument
387 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_get()
389 	return !!(ioread32(bank_reg(gpio, bank, reg_val)) & GPIO_BIT(offset));  in aspeed_gpio_get()
392 static void __aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,  in __aspeed_gpio_set()  argument
396 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in __aspeed_gpio_set()
401 	reg = gpio->dcache[GPIO_BANK(offset)];  in __aspeed_gpio_set()
404 		reg |= GPIO_BIT(offset);  in __aspeed_gpio_set()
406 		reg &= ~GPIO_BIT(offset);  in __aspeed_gpio_set()
407 	gpio->dcache[GPIO_BANK(offset)] = reg;  in __aspeed_gpio_set()
412 static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,  in aspeed_gpio_set()  argument
420 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set()
422 	__aspeed_gpio_set(gc, offset, val);  in aspeed_gpio_set()
425 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set()
429 static int aspeed_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_dir_in()  argument
432 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_dir_in()
438 	if (!have_input(gpio, offset))  in aspeed_gpio_dir_in()
444 	reg &= ~GPIO_BIT(offset);  in aspeed_gpio_dir_in()
446 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_in()
449 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_in()
457 			       unsigned int offset, int val)  in aspeed_gpio_dir_out()  argument
460 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_dir_out()
466 	if (!have_output(gpio, offset))  in aspeed_gpio_dir_out()
472 	reg |= GPIO_BIT(offset);  in aspeed_gpio_dir_out()
474 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_out()
475 	__aspeed_gpio_set(gc, offset, val);  in aspeed_gpio_dir_out()
479 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_out()
485 static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_get_direction()  argument
488 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_get_direction()
492 	if (!have_input(gpio, offset))  in aspeed_gpio_get_direction()
495 	if (!have_output(gpio, offset))  in aspeed_gpio_get_direction()
500 	val = ioread32(bank_reg(gpio, bank, reg_dir)) & GPIO_BIT(offset);  in aspeed_gpio_get_direction()
511 					   u32 *bit, int *offset)  in irqd_to_aspeed_gpio_data()  argument
515 	*offset = irqd_to_hwirq(d);  in irqd_to_aspeed_gpio_data()
520 	if (!have_irq(internal, *offset))  in irqd_to_aspeed_gpio_data()
524 	*bank = to_bank(*offset);  in irqd_to_aspeed_gpio_data()
525 	*bit = GPIO_BIT(*offset);  in irqd_to_aspeed_gpio_data()
536 	int rc, offset;  in aspeed_gpio_irq_ack()  local
540 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_ack()
547 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_ack()
552 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_ack()
563 	int rc, offset;  in aspeed_gpio_irq_set_mask()  local
566 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_set_mask()
573 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_set_mask()
583 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_set_mask()
608 	int rc, offset;  in aspeed_gpio_set_type()  local
611 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_set_type()
637 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set_type()
655 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set_type()
701 		unsigned int offset;  in set_irq_valid_mask()  local
705 		for_each_clear_bit(offset, &input, 32) {  in set_irq_valid_mask()
706 			unsigned int i = props->bank * 32 + offset;  in set_irq_valid_mask()
745 					unsigned int offset, bool enable)  in aspeed_gpio_reset_tolerance()  argument
753 	treg = bank_reg(gpio, to_bank(offset), reg_tolerance);  in aspeed_gpio_reset_tolerance()
756 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_reset_tolerance()
761 		val |= GPIO_BIT(offset);  in aspeed_gpio_reset_tolerance()
763 		val &= ~GPIO_BIT(offset);  in aspeed_gpio_reset_tolerance()
768 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_reset_tolerance()
774 static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset)  in aspeed_gpio_request()  argument
776 	if (!have_gpio(gpiochip_get_data(chip), offset))  in aspeed_gpio_request()
779 	return pinctrl_gpio_request(chip->base + offset);  in aspeed_gpio_request()
782 static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset)  in aspeed_gpio_free()  argument
784 	pinctrl_gpio_free(chip->base + offset);  in aspeed_gpio_free()
812 		unsigned int offset, unsigned int timer)  in register_allocated_timer()  argument
814 	if (WARN(gpio->offset_timer[offset] != 0,  in register_allocated_timer()
816 				offset, gpio->offset_timer[offset]))  in register_allocated_timer()
823 	gpio->offset_timer[offset] = timer;  in register_allocated_timer()
831 		unsigned int offset)  in unregister_allocated_timer()  argument
833 	if (WARN(gpio->offset_timer[offset] == 0,  in unregister_allocated_timer()
834 				"No timer allocated to offset %d\n", offset))  in unregister_allocated_timer()
837 	if (WARN(gpio->timer_users[gpio->offset_timer[offset]] == 0,  in unregister_allocated_timer()
839 				gpio->offset_timer[offset]))  in unregister_allocated_timer()
842 	gpio->timer_users[gpio->offset_timer[offset]]--;  in unregister_allocated_timer()
843 	gpio->offset_timer[offset] = 0;  in unregister_allocated_timer()
850 		unsigned int offset)  in timer_allocation_registered()  argument
852 	return gpio->offset_timer[offset] > 0;  in timer_allocation_registered()
856 static void configure_timer(struct aspeed_gpio *gpio, unsigned int offset,  in configure_timer()  argument
859 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in configure_timer()
860 	const u32 mask = GPIO_BIT(offset);  in configure_timer()
869 	iowrite32((val & ~mask) | GPIO_SET_DEBOUNCE1(timer, offset), addr);  in configure_timer()
873 	iowrite32((val & ~mask) | GPIO_SET_DEBOUNCE2(timer, offset), addr);  in configure_timer()
876 static int enable_debounce(struct gpio_chip *chip, unsigned int offset,  in enable_debounce()  argument
897 	if (timer_allocation_registered(gpio, offset)) {  in enable_debounce()
898 		rc = unregister_allocated_timer(gpio, offset);  in enable_debounce()
937 			configure_timer(gpio, offset, 0);  in enable_debounce()
951 	register_allocated_timer(gpio, offset, i);  in enable_debounce()
952 	configure_timer(gpio, offset, i);  in enable_debounce()
960 static int disable_debounce(struct gpio_chip *chip, unsigned int offset)  in disable_debounce()  argument
968 	rc = unregister_allocated_timer(gpio, offset);  in disable_debounce()
970 		configure_timer(gpio, offset, 0);  in disable_debounce()
977 static int set_debounce(struct gpio_chip *chip, unsigned int offset,  in set_debounce()  argument
982 	if (!have_debounce(gpio, offset))  in set_debounce()
986 		return enable_debounce(chip, offset, usecs);  in set_debounce()
988 	return disable_debounce(chip, offset);  in set_debounce()
991 static int aspeed_gpio_set_config(struct gpio_chip *chip, unsigned int offset,  in aspeed_gpio_set_config()  argument
998 		return set_debounce(chip, offset, arg);  in aspeed_gpio_set_config()
1002 		return pinctrl_gpio_set_config(offset, config);  in aspeed_gpio_set_config()
1008 		return aspeed_gpio_reset_tolerance(chip, offset, arg);  in aspeed_gpio_set_config()
1042 	int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);  in aspeed_gpio_copro_grab_gpio()  local
1043 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_copro_grab_gpio()
1050 	if (offset < 0 || offset > gpio->config->nr_gpios)  in aspeed_gpio_copro_grab_gpio()
1052 	bindex = offset >> 3;  in aspeed_gpio_copro_grab_gpio()
1073 		*bit = GPIO_OFFSET(offset);  in aspeed_gpio_copro_grab_gpio()
1088 	int rc = 0, bindex, offset = gpio_chip_hwgpio(desc);  in aspeed_gpio_copro_release_gpio()  local
1089 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_copro_release_gpio()
1095 	if (offset < 0 || offset > gpio->config->nr_gpios)  in aspeed_gpio_copro_release_gpio()
1097 	bindex = offset >> 3;  in aspeed_gpio_copro_release_gpio()