211 static inline void __iomem *bank_reg(struct aspeed_gpio *gpio,  in bank_reg()  argument
217 		return gpio->base + bank->val_regs + GPIO_VAL_VALUE;  in bank_reg()
219 		return gpio->base + bank->rdata_reg;  in bank_reg()
221 		return gpio->base + bank->val_regs + GPIO_VAL_DIR;  in bank_reg()
223 		return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;  in bank_reg()
225 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;  in bank_reg()
227 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;  in bank_reg()
229 		return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;  in bank_reg()
231 		return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS;  in bank_reg()
233 		return gpio->base + bank->debounce_regs + GPIO_DEBOUNCE_SEL1;  in bank_reg()
235 		return gpio->base + bank->debounce_regs + GPIO_DEBOUNCE_SEL2;  in bank_reg()
237 		return gpio->base + bank->tolerance_regs;  in bank_reg()
239 		return gpio->base + bank->cmdsrc_regs + GPIO_CMDSRC_0;  in bank_reg()
241 		return gpio->base + bank->cmdsrc_regs + GPIO_CMDSRC_1;  in bank_reg()
268 		struct aspeed_gpio *gpio, unsigned int offset)  in find_bank_props()  argument
270 	const struct aspeed_bank_props *props = gpio->config->props;  in find_bank_props()
281 static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset)  in have_gpio()  argument
283 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_gpio()
291 static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset)  in have_input()  argument
293 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_input()
301 static inline bool have_output(struct aspeed_gpio *gpio, unsigned int offset)  in have_output()  argument
303 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_output()
308 static void aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio,  in aspeed_gpio_change_cmd_source()  argument
312 	void __iomem *c0 = bank_reg(gpio, bank, reg_cmdsrc0);  in aspeed_gpio_change_cmd_source()
313 	void __iomem *c1 = bank_reg(gpio, bank, reg_cmdsrc1);  in aspeed_gpio_change_cmd_source()
340 static bool aspeed_gpio_copro_request(struct aspeed_gpio *gpio,  in aspeed_gpio_copro_request()  argument
345 	if (!copro_ops || !gpio->cf_copro_bankmap)  in aspeed_gpio_copro_request()
347 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_request()
356 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3, GPIO_CMDSRC_ARM);  in aspeed_gpio_copro_request()
359 	gpio->dcache[GPIO_BANK(offset)] = ioread32(bank_reg(gpio, bank, reg_rdata));  in aspeed_gpio_copro_request()
364 static void aspeed_gpio_copro_release(struct aspeed_gpio *gpio,  in aspeed_gpio_copro_release()  argument
369 	if (!copro_ops || !gpio->cf_copro_bankmap)  in aspeed_gpio_copro_release()
371 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_gpio_copro_release()
377 	aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3,  in aspeed_gpio_copro_release()
386 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_get()  local
389 	return !!(ioread32(bank_reg(gpio, bank, reg_val)) & GPIO_BIT(offset));  in aspeed_gpio_get()
395 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in __aspeed_gpio_set()  local
400 	addr = bank_reg(gpio, bank, reg_val);  in __aspeed_gpio_set()
401 	reg = gpio->dcache[GPIO_BANK(offset)];  in __aspeed_gpio_set()
407 	gpio->dcache[GPIO_BANK(offset)] = reg;  in __aspeed_gpio_set()
415 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_set()  local
419 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_set()
420 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set()
425 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set()
426 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_set()
431 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_dir_in()  local
433 	void __iomem *addr = bank_reg(gpio, bank, reg_dir);  in aspeed_gpio_dir_in()
438 	if (!have_input(gpio, offset))  in aspeed_gpio_dir_in()
441 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_dir_in()
446 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_in()
449 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_in()
451 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_dir_in()
459 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_dir_out()  local
461 	void __iomem *addr = bank_reg(gpio, bank, reg_dir);  in aspeed_gpio_dir_out()
466 	if (!have_output(gpio, offset))  in aspeed_gpio_dir_out()
469 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_dir_out()
474 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_out()
479 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_out()
480 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_dir_out()
487 	struct aspeed_gpio *gpio = gpiochip_get_data(gc);  in aspeed_gpio_get_direction()  local
492 	if (!have_input(gpio, offset))  in aspeed_gpio_get_direction()
495 	if (!have_output(gpio, offset))  in aspeed_gpio_get_direction()
498 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_get_direction()
500 	val = ioread32(bank_reg(gpio, bank, reg_dir)) & GPIO_BIT(offset);  in aspeed_gpio_get_direction()
502 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_get_direction()
509 					   struct aspeed_gpio **gpio,  in irqd_to_aspeed_gpio_data()  argument
523 	*gpio = internal;  in irqd_to_aspeed_gpio_data()
533 	struct aspeed_gpio *gpio;  in aspeed_gpio_irq_ack()  local
540 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_ack()
544 	status_addr = bank_reg(gpio, bank, reg_irq_status);  in aspeed_gpio_irq_ack()
546 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_irq_ack()
547 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_ack()
552 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_ack()
553 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_irq_ack()
559 	struct aspeed_gpio *gpio;  in aspeed_gpio_irq_set_mask()  local
566 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_irq_set_mask()
570 	addr = bank_reg(gpio, bank, reg_irq_enable);  in aspeed_gpio_irq_set_mask()
572 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_irq_set_mask()
573 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_set_mask()
583 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_set_mask()
584 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_irq_set_mask()
605 	struct aspeed_gpio *gpio;  in aspeed_gpio_set_type()  local
611 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);  in aspeed_gpio_set_type()
636 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_set_type()
637 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set_type()
639 	addr = bank_reg(gpio, bank, reg_irq_type0);  in aspeed_gpio_set_type()
644 	addr = bank_reg(gpio, bank, reg_irq_type1);  in aspeed_gpio_set_type()
649 	addr = bank_reg(gpio, bank, reg_irq_type2);  in aspeed_gpio_set_type()
655 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set_type()
656 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_set_type()
696 static void set_irq_valid_mask(struct aspeed_gpio *gpio)  in set_irq_valid_mask()  argument
698 	const struct aspeed_bank_props *props = gpio->config->props;  in set_irq_valid_mask()
708 			if (i >= gpio->config->nr_gpios)  in set_irq_valid_mask()
711 			clear_bit(i, gpio->chip.irq.valid_mask);  in set_irq_valid_mask()
718 static int aspeed_gpio_setup_irqs(struct aspeed_gpio *gpio,  in aspeed_gpio_setup_irqs()  argument
727 	gpio->irq = rc;  in aspeed_gpio_setup_irqs()
729 	set_irq_valid_mask(gpio);  in aspeed_gpio_setup_irqs()
731 	rc = gpiochip_irqchip_add(&gpio->chip, &aspeed_gpio_irqchip,  in aspeed_gpio_setup_irqs()
738 	gpiochip_set_chained_irqchip(&gpio->chip, &aspeed_gpio_irqchip,  in aspeed_gpio_setup_irqs()
739 				     gpio->irq, aspeed_gpio_irq_handler);  in aspeed_gpio_setup_irqs()
747 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_reset_tolerance()  local
753 	treg = bank_reg(gpio, to_bank(offset), reg_tolerance);  in aspeed_gpio_reset_tolerance()
755 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_reset_tolerance()
756 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_reset_tolerance()
768 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_reset_tolerance()
769 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_reset_tolerance()
787 static int usecs_to_cycles(struct aspeed_gpio *gpio, unsigned long usecs,  in usecs_to_cycles()  argument
794 	rate = clk_get_rate(gpio->clk);  in usecs_to_cycles()
811 static int register_allocated_timer(struct aspeed_gpio *gpio,  in register_allocated_timer()  argument
814 	if (WARN(gpio->offset_timer[offset] != 0,  in register_allocated_timer()
816 				offset, gpio->offset_timer[offset]))  in register_allocated_timer()
819 	if (WARN(gpio->timer_users[timer] == UINT_MAX,  in register_allocated_timer()
823 	gpio->offset_timer[offset] = timer;  in register_allocated_timer()
824 	gpio->timer_users[timer]++;  in register_allocated_timer()
830 static int unregister_allocated_timer(struct aspeed_gpio *gpio,  in unregister_allocated_timer()  argument
833 	if (WARN(gpio->offset_timer[offset] == 0,  in unregister_allocated_timer()
837 	if (WARN(gpio->timer_users[gpio->offset_timer[offset]] == 0,  in unregister_allocated_timer()
839 				gpio->offset_timer[offset]))  in unregister_allocated_timer()
842 	gpio->timer_users[gpio->offset_timer[offset]]--;  in unregister_allocated_timer()
843 	gpio->offset_timer[offset] = 0;  in unregister_allocated_timer()
849 static inline bool timer_allocation_registered(struct aspeed_gpio *gpio,  in timer_allocation_registered()  argument
852 	return gpio->offset_timer[offset] > 0;  in timer_allocation_registered()
856 static void configure_timer(struct aspeed_gpio *gpio, unsigned int offset,  in configure_timer()  argument
867 	addr = bank_reg(gpio, bank, reg_debounce_sel1);  in configure_timer()
871 	addr = bank_reg(gpio, bank, reg_debounce_sel2);  in configure_timer()
879 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in enable_debounce()  local
885 	if (!gpio->clk)  in enable_debounce()
888 	rc = usecs_to_cycles(gpio, usecs, &requested_cycles);  in enable_debounce()
891 				usecs, clk_get_rate(gpio->clk), rc);  in enable_debounce()
895 	spin_lock_irqsave(&gpio->lock, flags);  in enable_debounce()
897 	if (timer_allocation_registered(gpio, offset)) {  in enable_debounce()
898 		rc = unregister_allocated_timer(gpio, offset);  in enable_debounce()
907 		cycles = ioread32(gpio->base + debounce_timers[i]);  in enable_debounce()
919 		for (j = 1; j < ARRAY_SIZE(gpio->timer_users); j++) {  in enable_debounce()
920 			if (gpio->timer_users[j] == 0)  in enable_debounce()
924 		if (j == ARRAY_SIZE(gpio->timer_users)) {  in enable_debounce()
937 			configure_timer(gpio, offset, 0);  in enable_debounce()
943 		iowrite32(requested_cycles, gpio->base + debounce_timers[i]);  in enable_debounce()
951 	register_allocated_timer(gpio, offset, i);  in enable_debounce()
952 	configure_timer(gpio, offset, i);  in enable_debounce()
955 	spin_unlock_irqrestore(&gpio->lock, flags);  in enable_debounce()
962 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in disable_debounce()  local
966 	spin_lock_irqsave(&gpio->lock, flags);  in disable_debounce()
968 	rc = unregister_allocated_timer(gpio, offset);  in disable_debounce()
970 		configure_timer(gpio, offset, 0);  in disable_debounce()
972 	spin_unlock_irqrestore(&gpio->lock, flags);  in disable_debounce()
980 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in set_debounce()  local
982 	if (!have_debounce(gpio, offset))  in set_debounce()
1041 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_copro_grab_gpio()  local
1046 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_grab_gpio()
1047 		gpio->cf_copro_bankmap = kzalloc(gpio->config->nr_gpios >> 3, GFP_KERNEL);  in aspeed_gpio_copro_grab_gpio()
1048 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_grab_gpio()
1050 	if (offset < 0 || offset > gpio->config->nr_gpios)  in aspeed_gpio_copro_grab_gpio()
1054 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_copro_grab_gpio()
1057 	if (gpio->cf_copro_bankmap[bindex] == 0xff) {  in aspeed_gpio_copro_grab_gpio()
1061 	gpio->cf_copro_bankmap[bindex]++;  in aspeed_gpio_copro_grab_gpio()
1064 	if (gpio->cf_copro_bankmap[bindex] == 1)  in aspeed_gpio_copro_grab_gpio()
1065 		aspeed_gpio_change_cmd_source(gpio, bank, bindex,  in aspeed_gpio_copro_grab_gpio()
1075 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_copro_grab_gpio()
1087 	struct aspeed_gpio *gpio = gpiochip_get_data(chip);  in aspeed_gpio_copro_release_gpio()  local
1092 	if (!gpio->cf_copro_bankmap)  in aspeed_gpio_copro_release_gpio()
1095 	if (offset < 0 || offset > gpio->config->nr_gpios)  in aspeed_gpio_copro_release_gpio()
1099 	spin_lock_irqsave(&gpio->lock, flags);  in aspeed_gpio_copro_release_gpio()
1102 	if (gpio->cf_copro_bankmap[bindex] == 0) {  in aspeed_gpio_copro_release_gpio()
1106 	gpio->cf_copro_bankmap[bindex]--;  in aspeed_gpio_copro_release_gpio()
1109 	if (gpio->cf_copro_bankmap[bindex] == 0)  in aspeed_gpio_copro_release_gpio()
1110 		aspeed_gpio_change_cmd_source(gpio, bank, bindex,  in aspeed_gpio_copro_release_gpio()
1113 	spin_unlock_irqrestore(&gpio->lock, flags);  in aspeed_gpio_copro_release_gpio()
1158 	struct aspeed_gpio *gpio;  in aspeed_gpio_probe()  local
1162 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);  in aspeed_gpio_probe()
1163 	if (!gpio)  in aspeed_gpio_probe()
1167 	gpio->base = devm_ioremap_resource(&pdev->dev, res);  in aspeed_gpio_probe()
1168 	if (IS_ERR(gpio->base))  in aspeed_gpio_probe()
1169 		return PTR_ERR(gpio->base);  in aspeed_gpio_probe()
1171 	spin_lock_init(&gpio->lock);  in aspeed_gpio_probe()
1177 	gpio->clk = of_clk_get(pdev->dev.of_node, 0);  in aspeed_gpio_probe()
1178 	if (IS_ERR(gpio->clk)) {  in aspeed_gpio_probe()
1181 		gpio->clk = NULL;  in aspeed_gpio_probe()
1184 	gpio->config = gpio_id->data;  in aspeed_gpio_probe()
1186 	gpio->chip.parent = &pdev->dev;  in aspeed_gpio_probe()
1187 	gpio->chip.ngpio = gpio->config->nr_gpios;  in aspeed_gpio_probe()
1188 	gpio->chip.parent = &pdev->dev;  in aspeed_gpio_probe()
1189 	gpio->chip.direction_input = aspeed_gpio_dir_in;  in aspeed_gpio_probe()
1190 	gpio->chip.direction_output = aspeed_gpio_dir_out;  in aspeed_gpio_probe()
1191 	gpio->chip.get_direction = aspeed_gpio_get_direction;  in aspeed_gpio_probe()
1192 	gpio->chip.request = aspeed_gpio_request;  in aspeed_gpio_probe()
1193 	gpio->chip.free = aspeed_gpio_free;  in aspeed_gpio_probe()
1194 	gpio->chip.get = aspeed_gpio_get;  in aspeed_gpio_probe()
1195 	gpio->chip.set = aspeed_gpio_set;  in aspeed_gpio_probe()
1196 	gpio->chip.set_config = aspeed_gpio_set_config;  in aspeed_gpio_probe()
1197 	gpio->chip.label = dev_name(&pdev->dev);  in aspeed_gpio_probe()
1198 	gpio->chip.base = -1;  in aspeed_gpio_probe()
1199 	gpio->chip.irq.need_valid_mask = true;  in aspeed_gpio_probe()
1202 	banks = gpio->config->nr_gpios >> 5;  in aspeed_gpio_probe()
1203 	gpio->dcache = devm_kcalloc(&pdev->dev,  in aspeed_gpio_probe()
1205 	if (!gpio->dcache)  in aspeed_gpio_probe()
1214 		void __iomem *addr = bank_reg(gpio, bank, reg_rdata);  in aspeed_gpio_probe()
1215 		gpio->dcache[i] = ioread32(addr);  in aspeed_gpio_probe()
1216 		aspeed_gpio_change_cmd_source(gpio, bank, 0, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1217 		aspeed_gpio_change_cmd_source(gpio, bank, 1, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1218 		aspeed_gpio_change_cmd_source(gpio, bank, 2, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1219 		aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM);  in aspeed_gpio_probe()
1222 	rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);  in aspeed_gpio_probe()
1226 	gpio->offset_timer =  in aspeed_gpio_probe()
1227 		devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL);  in aspeed_gpio_probe()
1229 	return aspeed_gpio_setup_irqs(gpio, pdev);  in aspeed_gpio_probe()