Lines Matching refs:BIT_ULL
73 #define DFH_EOL BIT_ULL(40) /* End of list */
94 #define FME_CAP_SOCKET_ID BIT_ULL(8) /* Socket ID */
95 #define FME_CAP_PCIE0_LINK_AVL BIT_ULL(12) /* PCIE0 Link */
96 #define FME_CAP_PCIE1_LINK_AVL BIT_ULL(13) /* PCIE1 Link */
97 #define FME_CAP_COHR_LINK_AVL BIT_ULL(14) /* Coherent Link */
98 #define FME_CAP_IOMMU_AVL BIT_ULL(16) /* IOMMU available */
110 #define FME_PORT_OFST_ACC_CTRL BIT_ULL(55)
113 #define FME_PORT_OFST_IMP BIT_ULL(60)
129 #define PORT_CTRL_SFTRST BIT_ULL(0) /* Port soft reset */
131 #define PORT_CTRL_LATENCY BIT_ULL(2)
132 #define PORT_CTRL_SFTRST_ACK BIT_ULL(4) /* HW ack for reset */