1035 	void __iomem		*dev_csr;  member
1073 	l3cesr = readl(ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1082 	l3celr = readl(ctx->dev_csr + L3C_ELR);  in xgene_edac_l3_check()
1083 	l3caelr = readl(ctx->dev_csr + L3C_AELR);  in xgene_edac_l3_check()
1084 	l3cbelr = readl(ctx->dev_csr + L3C_BELR);  in xgene_edac_l3_check()
1112 	writel(0, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1131 	val = readl(ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1140 	writel(val, ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1166 	writel(0xFFFFFFFF, ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_inject_ctrl_write()
1201 	void __iomem *dev_csr;  in xgene_edac_l3_add()  local
1213 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_l3_add()
1214 	if (IS_ERR(dev_csr)) {  in xgene_edac_l3_add()
1217 		rc = PTR_ERR(dev_csr);  in xgene_edac_l3_add()
1231 	ctx->dev_csr = dev_csr;  in xgene_edac_l3_add()
1410 	reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1422 	info = readl(ctx->dev_csr + XGICTRANSERRREQINFO);  in xgene_edac_iob_gic_report()
1426 	writel(reg, ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1430 	reg = readl(ctx->dev_csr + GLBL_ERR_STS);  in xgene_edac_iob_gic_report()
1434 		err_addr_lo = readl(ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1435 		err_addr_hi = readl(ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1439 		writel(err_addr_lo, ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1440 		writel(err_addr_hi, ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1443 		err_addr_lo = readl(ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1444 		err_addr_hi = readl(ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1448 		writel(err_addr_lo, ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1449 		writel(err_addr_hi, ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1455 		err_addr_lo = readl(ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1456 		err_addr_hi = readl(ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1460 		writel(err_addr_lo, ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1461 		writel(err_addr_hi, ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1464 		err_addr_lo = readl(ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1465 		err_addr_hi = readl(ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1469 		writel(err_addr_lo, ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1470 		writel(err_addr_hi, ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1529 	reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1576 	err_addr_lo = readl(ctx->dev_csr + IOBBATRANSERRREQINFOL);  in xgene_edac_rb_report()
1577 	err_addr_hi = readl(ctx->dev_csr + IOBBATRANSERRREQINFOH);  in xgene_edac_rb_report()
1583 			readl(ctx->dev_csr + IOBBATRANSERRCSWREQID));  in xgene_edac_rb_report()
1584 	writel(reg, ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1595 	reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1618 	writel(reg, ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1622 	reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1625 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOL);  in xgene_edac_pa_report()
1626 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOH);  in xgene_edac_pa_report()
1632 	writel(reg, ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1636 	reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1639 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOL);  in xgene_edac_pa_report()
1640 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOH);  in xgene_edac_pa_report()
1646 	writel(reg, ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1727 		       ctx->dev_csr + IOBAXIS0TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1729 		       ctx->dev_csr + IOBAXIS1TRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1731 		       ctx->dev_csr + XGICTRANSERRINTMSK);  in xgene_edac_soc_hw_init()
1743 	void __iomem *dev_csr;  in xgene_edac_soc_add()  local
1756 	dev_csr = devm_ioremap_resource(edac->dev, &res);  in xgene_edac_soc_add()
1757 	if (IS_ERR(dev_csr)) {  in xgene_edac_soc_add()
1760 		rc = PTR_ERR(dev_csr);  in xgene_edac_soc_add()
1774 	ctx->dev_csr = dev_csr;  in xgene_edac_soc_add()