109 	int	dimm;  member
351 static int get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm,  in get_dimm_info()  argument
377 	dimm->nr_pages = npages;  in get_dimm_info()
378 	dimm->grain = 32;  in get_dimm_info()
379 	dimm->dtype = get_width(mtr);  in get_dimm_info()
380 	dimm->mtype = MEM_DDR4;  in get_dimm_info()
381 	dimm->edac_mode = EDAC_SECDED; /* likely better than this */  in get_dimm_info()
382 	snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_MC#%u_Chan#%u_DIMM#%u",  in get_dimm_info()
388 static int get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,  in get_nvdimm_info()  argument
421 	dimm->nr_pages = size >> PAGE_SHIFT;  in get_nvdimm_info()
422 	dimm->grain = 32;  in get_nvdimm_info()
423 	dimm->dtype = DEV_UNKNOWN;  in get_nvdimm_info()
424 	dimm->mtype = MEM_NVDIMM;  in get_nvdimm_info()
425 	dimm->edac_mode = EDAC_SECDED; /* likely better than this */  in get_nvdimm_info()
428 		 imc->mc, chan, dimmno, size >> 20, dimm->nr_pages);  in get_nvdimm_info()
430 	snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_MC#%u_Chan#%u_DIMM#%u",  in get_nvdimm_info()
453 	struct dimm_info *dimm;  in skx_get_dimm_config()  local
462 			dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,  in skx_get_dimm_config()
467 				ndimms += get_dimm_info(mtr, amap, dimm, imc, i, j);  in skx_get_dimm_config()
469 				ndimms += get_nvdimm_info(dimm, imc, i, j);  in skx_get_dimm_config()
818 	res->dimm = chan_rank / 4;  in skx_rir_decode()
822 		 res->addr, res->dimm, res->rank,  in skx_rir_decode()
864 	struct skx_dimm *dimm = &r->dev->imc[r->imc].chan[r->channel].dimms[r->dimm];  in skx_mad_decode()  local
865 	int bg0 = dimm->fine_grain_bank ? 6 : 13;  in skx_mad_decode()
867 	if (dimm->close_pg) {  in skx_mad_decode()
868 		r->row = skx_bits(r->rank_address, dimm->rowbits, skx_close_row);  in skx_mad_decode()
869 		r->column = skx_bits(r->rank_address, dimm->colbits, skx_close_column);  in skx_mad_decode()
871 		r->bank_address = skx_bank_bits(r->rank_address, 8, 9, dimm->bank_xor_enable, 22, 28);  in skx_mad_decode()
872 		r->bank_group = skx_bank_bits(r->rank_address, 6, 7, dimm->bank_xor_enable, 20, 21);  in skx_mad_decode()
874 		r->row = skx_bits(r->rank_address, dimm->rowbits, skx_open_row);  in skx_mad_decode()
875 		if (dimm->fine_grain_bank)  in skx_mad_decode()
876 			r->column = skx_bits(r->rank_address, dimm->colbits, skx_open_fine_column);  in skx_mad_decode()
878 			r->column = skx_bits(r->rank_address, dimm->colbits, skx_open_column);  in skx_mad_decode()
879 		r->bank_address = skx_bank_bits(r->rank_address, 18, 19, dimm->bank_xor_enable, 22, 23);  in skx_mad_decode()
880 		r->bank_group = skx_bank_bits(r->rank_address, bg0, 17, dimm->bank_xor_enable, 20, 21);  in skx_mad_decode()
882 	r->row &= (1u << dimm->rowbits) - 1;  in skx_mad_decode()
1023 			     res->channel, res->dimm, -1,  in skx_mce_output_error()