Lines Matching refs:dc
27 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
29 return dc->ch_regs; in __dma_regs()
33 const struct txx9dmac_chan *dc) in __dma_regs32() argument
35 return dc->ch_regs; in __dma_regs32()
38 #define channel64_readq(dc, name) \ argument
39 __raw_readq(&(__dma_regs(dc)->name))
40 #define channel64_writeq(dc, name, val) \ argument
41 __raw_writeq((val), &(__dma_regs(dc)->name))
42 #define channel64_readl(dc, name) \ argument
43 __raw_readl(&(__dma_regs(dc)->name))
44 #define channel64_writel(dc, name, val) \ argument
45 __raw_writel((val), &(__dma_regs(dc)->name))
47 #define channel32_readl(dc, name) \ argument
48 __raw_readl(&(__dma_regs32(dc)->name))
49 #define channel32_writel(dc, name, val) \ argument
50 __raw_writel((val), &(__dma_regs32(dc)->name))
52 #define channel_readq(dc, name) channel64_readq(dc, name) argument
53 #define channel_writeq(dc, name, val) channel64_writeq(dc, name, val) argument
54 #define channel_readl(dc, name) \ argument
55 (is_dmac64(dc) ? \
56 channel64_readl(dc, name) : channel32_readl(dc, name))
57 #define channel_writel(dc, name, val) \ argument
58 (is_dmac64(dc) ? \
59 channel64_writel(dc, name, val) : channel32_writel(dc, name, val))
61 static dma_addr_t channel64_read_CHAR(const struct txx9dmac_chan *dc) in channel64_read_CHAR() argument
63 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_read_CHAR()
64 return channel64_readq(dc, CHAR); in channel64_read_CHAR()
66 return channel64_readl(dc, CHAR); in channel64_read_CHAR()
69 static void channel64_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel64_write_CHAR() argument
71 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_write_CHAR()
72 channel64_writeq(dc, CHAR, val); in channel64_write_CHAR()
74 channel64_writel(dc, CHAR, val); in channel64_write_CHAR()
77 static void channel64_clear_CHAR(const struct txx9dmac_chan *dc) in channel64_clear_CHAR() argument
80 channel64_writel(dc, CHAR, 0); in channel64_clear_CHAR()
81 channel64_writel(dc, __pad_CHAR, 0); in channel64_clear_CHAR()
83 channel64_writeq(dc, CHAR, 0); in channel64_clear_CHAR()
87 static dma_addr_t channel_read_CHAR(const struct txx9dmac_chan *dc) in channel_read_CHAR() argument
89 if (is_dmac64(dc)) in channel_read_CHAR()
90 return channel64_read_CHAR(dc); in channel_read_CHAR()
92 return channel32_readl(dc, CHAR); in channel_read_CHAR()
95 static void channel_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel_write_CHAR() argument
97 if (is_dmac64(dc)) in channel_write_CHAR()
98 channel64_write_CHAR(dc, val); in channel_write_CHAR()
100 channel32_writel(dc, CHAR, val); in channel_write_CHAR()
147 static dma_addr_t desc_read_CHAR(const struct txx9dmac_chan *dc, in desc_read_CHAR() argument
150 return is_dmac64(dc) ? desc->hwdesc.CHAR : desc->hwdesc32.CHAR; in desc_read_CHAR()
153 static void desc_write_CHAR(const struct txx9dmac_chan *dc, in desc_write_CHAR() argument
156 if (is_dmac64(dc)) in desc_write_CHAR()
166 static struct txx9dmac_desc *txx9dmac_first_active(struct txx9dmac_chan *dc) in txx9dmac_first_active() argument
168 return list_entry(dc->active_list.next, in txx9dmac_first_active()
172 static struct txx9dmac_desc *txx9dmac_last_active(struct txx9dmac_chan *dc) in txx9dmac_last_active() argument
174 return list_entry(dc->active_list.prev, in txx9dmac_last_active()
178 static struct txx9dmac_desc *txx9dmac_first_queued(struct txx9dmac_chan *dc) in txx9dmac_first_queued() argument
180 return list_entry(dc->queue.next, struct txx9dmac_desc, desc_node); in txx9dmac_first_queued()
192 static struct txx9dmac_desc *txx9dmac_desc_alloc(struct txx9dmac_chan *dc, in txx9dmac_desc_alloc() argument
195 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_desc_alloc()
202 dma_async_tx_descriptor_init(&desc->txd, &dc->chan); in txx9dmac_desc_alloc()
206 desc->txd.phys = dma_map_single(chan2parent(&dc->chan), &desc->hwdesc, in txx9dmac_desc_alloc()
211 static struct txx9dmac_desc *txx9dmac_desc_get(struct txx9dmac_chan *dc) in txx9dmac_desc_get() argument
217 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
218 list_for_each_entry_safe(desc, _desc, &dc->free_list, desc_node) { in txx9dmac_desc_get()
224 dev_dbg(chan2dev(&dc->chan), "desc %p not ACKed\n", desc); in txx9dmac_desc_get()
227 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
229 dev_vdbg(chan2dev(&dc->chan), "scanned %u descriptors on freelist\n", in txx9dmac_desc_get()
232 ret = txx9dmac_desc_alloc(dc, GFP_ATOMIC); in txx9dmac_desc_get()
234 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
235 dc->descs_allocated++; in txx9dmac_desc_get()
236 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
238 dev_err(chan2dev(&dc->chan), in txx9dmac_desc_get()
244 static void txx9dmac_sync_desc_for_cpu(struct txx9dmac_chan *dc, in txx9dmac_sync_desc_for_cpu() argument
247 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_sync_desc_for_cpu()
251 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
254 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
263 static void txx9dmac_desc_put(struct txx9dmac_chan *dc, in txx9dmac_desc_put() argument
269 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_desc_put()
271 spin_lock_bh(&dc->lock); in txx9dmac_desc_put()
273 dev_vdbg(chan2dev(&dc->chan), in txx9dmac_desc_put()
276 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_desc_put()
277 dev_vdbg(chan2dev(&dc->chan), "moving desc %p to freelist\n", in txx9dmac_desc_put()
279 list_add(&desc->desc_node, &dc->free_list); in txx9dmac_desc_put()
280 spin_unlock_bh(&dc->lock); in txx9dmac_desc_put()
286 static void txx9dmac_dump_regs(struct txx9dmac_chan *dc) in txx9dmac_dump_regs() argument
288 if (is_dmac64(dc)) in txx9dmac_dump_regs()
289 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
292 (u64)channel64_read_CHAR(dc), in txx9dmac_dump_regs()
293 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
294 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
295 channel64_readl(dc, CNTR), in txx9dmac_dump_regs()
296 channel64_readl(dc, SAIR), in txx9dmac_dump_regs()
297 channel64_readl(dc, DAIR), in txx9dmac_dump_regs()
298 channel64_readl(dc, CCR), in txx9dmac_dump_regs()
299 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
301 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
304 channel32_readl(dc, CHAR), in txx9dmac_dump_regs()
305 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
306 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
307 channel32_readl(dc, CNTR), in txx9dmac_dump_regs()
308 channel32_readl(dc, SAIR), in txx9dmac_dump_regs()
309 channel32_readl(dc, DAIR), in txx9dmac_dump_regs()
310 channel32_readl(dc, CCR), in txx9dmac_dump_regs()
311 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
314 static void txx9dmac_reset_chan(struct txx9dmac_chan *dc) in txx9dmac_reset_chan() argument
316 channel_writel(dc, CCR, TXX9_DMA_CCR_CHRST); in txx9dmac_reset_chan()
317 if (is_dmac64(dc)) { in txx9dmac_reset_chan()
318 channel64_clear_CHAR(dc); in txx9dmac_reset_chan()
319 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
320 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
322 channel_writel(dc, CHAR, 0); in txx9dmac_reset_chan()
323 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
324 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
326 channel_writel(dc, CNTR, 0); in txx9dmac_reset_chan()
327 channel_writel(dc, SAIR, 0); in txx9dmac_reset_chan()
328 channel_writel(dc, DAIR, 0); in txx9dmac_reset_chan()
329 channel_writel(dc, CCR, 0); in txx9dmac_reset_chan()
334 static void txx9dmac_dostart(struct txx9dmac_chan *dc, in txx9dmac_dostart() argument
337 struct txx9dmac_slave *ds = dc->chan.private; in txx9dmac_dostart()
340 dev_vdbg(chan2dev(&dc->chan), "dostart %u %p\n", in txx9dmac_dostart()
343 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
344 dev_err(chan2dev(&dc->chan), in txx9dmac_dostart()
346 txx9dmac_dump_regs(dc); in txx9dmac_dostart()
351 if (is_dmac64(dc)) { in txx9dmac_dostart()
352 channel64_writel(dc, CNTR, 0); in txx9dmac_dostart()
353 channel64_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
366 channel64_writel(dc, SAIR, sai); in txx9dmac_dostart()
367 channel64_writel(dc, DAIR, dai); in txx9dmac_dostart()
369 channel64_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
371 channel64_write_CHAR(dc, first->txd.phys); in txx9dmac_dostart()
373 channel32_writel(dc, CNTR, 0); in txx9dmac_dostart()
374 channel32_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
387 channel32_writel(dc, SAIR, sai); in txx9dmac_dostart()
388 channel32_writel(dc, DAIR, dai); in txx9dmac_dostart()
390 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
392 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
394 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
395 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
403 txx9dmac_descriptor_complete(struct txx9dmac_chan *dc, in txx9dmac_descriptor_complete() argument
409 dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n", in txx9dmac_descriptor_complete()
415 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_descriptor_complete()
416 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_descriptor_complete()
417 list_move(&desc->desc_node, &dc->free_list); in txx9dmac_descriptor_complete()
428 static void txx9dmac_dequeue(struct txx9dmac_chan *dc, struct list_head *list) in txx9dmac_dequeue() argument
430 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_dequeue()
436 desc = txx9dmac_first_queued(dc); in txx9dmac_dequeue()
438 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_dequeue()
439 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_dequeue()
447 !txx9dmac_chan_INTENT(dc)) in txx9dmac_dequeue()
449 } while (!list_empty(&dc->queue)); in txx9dmac_dequeue()
452 static void txx9dmac_complete_all(struct txx9dmac_chan *dc) in txx9dmac_complete_all() argument
461 list_splice_init(&dc->active_list, &list); in txx9dmac_complete_all()
462 if (!list_empty(&dc->queue)) { in txx9dmac_complete_all()
463 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_complete_all()
464 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_complete_all()
468 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_complete_all()
471 static void txx9dmac_dump_desc(struct txx9dmac_chan *dc, in txx9dmac_dump_desc() argument
474 if (is_dmac64(dc)) { in txx9dmac_dump_desc()
476 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
480 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
489 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
493 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
502 static void txx9dmac_handle_error(struct txx9dmac_chan *dc, u32 csr) in txx9dmac_handle_error() argument
513 dev_crit(chan2dev(&dc->chan), "Abnormal Chain Completion\n"); in txx9dmac_handle_error()
514 txx9dmac_dump_regs(dc); in txx9dmac_handle_error()
516 bad_desc = txx9dmac_first_active(dc); in txx9dmac_handle_error()
523 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
525 if (list_empty(&dc->active_list) && !list_empty(&dc->queue)) in txx9dmac_handle_error()
526 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_handle_error()
527 if (!list_empty(&dc->active_list)) in txx9dmac_handle_error()
528 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_handle_error()
530 dev_crit(chan2dev(&dc->chan), in txx9dmac_handle_error()
533 txx9dmac_dump_desc(dc, &bad_desc->hwdesc); in txx9dmac_handle_error()
535 txx9dmac_dump_desc(dc, &child->hwdesc); in txx9dmac_handle_error()
537 txx9dmac_descriptor_complete(dc, bad_desc); in txx9dmac_handle_error()
540 static void txx9dmac_scan_descriptors(struct txx9dmac_chan *dc) in txx9dmac_scan_descriptors() argument
547 if (is_dmac64(dc)) { in txx9dmac_scan_descriptors()
548 chain = channel64_read_CHAR(dc); in txx9dmac_scan_descriptors()
549 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
550 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
552 chain = channel32_readl(dc, CHAR); in txx9dmac_scan_descriptors()
553 csr = channel32_readl(dc, CSR); in txx9dmac_scan_descriptors()
554 channel32_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
559 txx9dmac_complete_all(dc); in txx9dmac_scan_descriptors()
565 dev_vdbg(chan2dev(&dc->chan), "scan_descriptors: char=%#llx\n", in txx9dmac_scan_descriptors()
568 list_for_each_entry_safe(desc, _desc, &dc->active_list, desc_node) { in txx9dmac_scan_descriptors()
569 if (desc_read_CHAR(dc, desc) == chain) { in txx9dmac_scan_descriptors()
577 if (desc_read_CHAR(dc, child) == chain) { in txx9dmac_scan_descriptors()
588 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_scan_descriptors()
592 txx9dmac_handle_error(dc, csr); in txx9dmac_scan_descriptors()
596 dev_err(chan2dev(&dc->chan), in txx9dmac_scan_descriptors()
600 txx9dmac_reset_chan(dc); in txx9dmac_scan_descriptors()
602 if (!list_empty(&dc->queue)) { in txx9dmac_scan_descriptors()
603 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_scan_descriptors()
604 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_scan_descriptors()
612 struct txx9dmac_chan *dc; in txx9dmac_chan_tasklet() local
614 dc = (struct txx9dmac_chan *)data; in txx9dmac_chan_tasklet()
615 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
616 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", csr); in txx9dmac_chan_tasklet()
618 spin_lock(&dc->lock); in txx9dmac_chan_tasklet()
621 txx9dmac_scan_descriptors(dc); in txx9dmac_chan_tasklet()
622 spin_unlock(&dc->lock); in txx9dmac_chan_tasklet()
623 irq = dc->irq; in txx9dmac_chan_tasklet()
630 struct txx9dmac_chan *dc = dev_id; in txx9dmac_chan_interrupt() local
632 dev_vdbg(chan2dev(&dc->chan), "interrupt: status=%#x\n", in txx9dmac_chan_interrupt()
633 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
635 tasklet_schedule(&dc->tasklet); in txx9dmac_chan_interrupt()
649 struct txx9dmac_chan *dc; in txx9dmac_tasklet() local
659 dc = ddev->chan[i]; in txx9dmac_tasklet()
660 csr = channel_readl(dc, CSR); in txx9dmac_tasklet()
661 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", in txx9dmac_tasklet()
663 spin_lock(&dc->lock); in txx9dmac_tasklet()
666 txx9dmac_scan_descriptors(dc); in txx9dmac_tasklet()
667 spin_unlock(&dc->lock); in txx9dmac_tasklet()
697 struct txx9dmac_chan *dc = to_txx9dmac_chan(tx->chan); in txx9dmac_tx_submit() local
700 spin_lock_bh(&dc->lock); in txx9dmac_tx_submit()
706 list_add_tail(&desc->desc_node, &dc->queue); in txx9dmac_tx_submit()
707 spin_unlock_bh(&dc->lock); in txx9dmac_tx_submit()
716 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_dma_memcpy() local
717 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_dma_memcpy()
752 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_dma_memcpy()
754 txx9dmac_desc_put(dc, first); in txx9dmac_prep_dma_memcpy()
763 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
769 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
782 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_dma_memcpy()
783 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
795 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_dma_memcpy()
796 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
811 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_slave_sg() local
812 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_slave_sg()
836 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_slave_sg()
838 txx9dmac_desc_put(dc, first); in txx9dmac_prep_slave_sg()
871 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_slave_sg()
876 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_slave_sg()
877 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
890 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_slave_sg()
891 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
903 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_terminate_all() local
908 spin_lock_bh(&dc->lock); in txx9dmac_terminate_all()
910 txx9dmac_reset_chan(dc); in txx9dmac_terminate_all()
913 list_splice_init(&dc->queue, &list); in txx9dmac_terminate_all()
914 list_splice_init(&dc->active_list, &list); in txx9dmac_terminate_all()
916 spin_unlock_bh(&dc->lock); in txx9dmac_terminate_all()
920 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_terminate_all()
929 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_tx_status() local
936 spin_lock_bh(&dc->lock); in txx9dmac_tx_status()
937 txx9dmac_scan_descriptors(dc); in txx9dmac_tx_status()
938 spin_unlock_bh(&dc->lock); in txx9dmac_tx_status()
943 static void txx9dmac_chain_dynamic(struct txx9dmac_chan *dc, in txx9dmac_chain_dynamic() argument
946 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_chain_dynamic()
951 txx9dmac_dequeue(dc, &list); in txx9dmac_chain_dynamic()
953 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_chain_dynamic()
954 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_chain_dynamic()
958 if (!(channel_readl(dc, CSR) & TXX9_DMA_CSR_CHNEN) && in txx9dmac_chain_dynamic()
959 channel_read_CHAR(dc) == prev->txd.phys) in txx9dmac_chain_dynamic()
961 channel_write_CHAR(dc, desc->txd.phys); in txx9dmac_chain_dynamic()
962 list_splice_tail(&list, &dc->active_list); in txx9dmac_chain_dynamic()
967 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_issue_pending() local
969 spin_lock_bh(&dc->lock); in txx9dmac_issue_pending()
971 if (!list_empty(&dc->active_list)) in txx9dmac_issue_pending()
972 txx9dmac_scan_descriptors(dc); in txx9dmac_issue_pending()
973 if (!list_empty(&dc->queue)) { in txx9dmac_issue_pending()
974 if (list_empty(&dc->active_list)) { in txx9dmac_issue_pending()
975 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_issue_pending()
976 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_issue_pending()
978 struct txx9dmac_desc *prev = txx9dmac_last_active(dc); in txx9dmac_issue_pending()
981 txx9dmac_chan_INTENT(dc)) in txx9dmac_issue_pending()
982 txx9dmac_chain_dynamic(dc, prev); in txx9dmac_issue_pending()
986 spin_unlock_bh(&dc->lock); in txx9dmac_issue_pending()
991 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_alloc_chan_resources() local
999 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_alloc_chan_resources()
1006 dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; in txx9dmac_alloc_chan_resources()
1007 txx9dmac_chan_set_SMPCHN(dc); in txx9dmac_alloc_chan_resources()
1008 if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN)) in txx9dmac_alloc_chan_resources()
1009 dc->ccr |= TXX9_DMA_CCR_INTENC; in txx9dmac_alloc_chan_resources()
1013 dc->ccr |= TXX9_DMA_CCR_XFSZ_X8; in txx9dmac_alloc_chan_resources()
1018 dc->ccr |= TXX9_DMA_CCR_EXTRQ | in txx9dmac_alloc_chan_resources()
1020 txx9dmac_chan_set_INTENT(dc); in txx9dmac_alloc_chan_resources()
1023 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1024 i = dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1025 while (dc->descs_allocated < TXX9_DMA_INITIAL_DESC_COUNT) { in txx9dmac_alloc_chan_resources()
1026 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1028 desc = txx9dmac_desc_alloc(dc, GFP_KERNEL); in txx9dmac_alloc_chan_resources()
1032 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1035 txx9dmac_desc_put(dc, desc); in txx9dmac_alloc_chan_resources()
1037 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1038 i = ++dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1040 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1050 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_free_chan_resources() local
1051 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_free_chan_resources()
1056 dc->descs_allocated); in txx9dmac_free_chan_resources()
1059 BUG_ON(!list_empty(&dc->active_list)); in txx9dmac_free_chan_resources()
1060 BUG_ON(!list_empty(&dc->queue)); in txx9dmac_free_chan_resources()
1061 BUG_ON(channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT); in txx9dmac_free_chan_resources()
1063 spin_lock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1064 list_splice_init(&dc->free_list, &list); in txx9dmac_free_chan_resources()
1065 dc->descs_allocated = 0; in txx9dmac_free_chan_resources()
1066 spin_unlock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1092 struct txx9dmac_chan *dc; in txx9dmac_chan_probe() local
1097 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); in txx9dmac_chan_probe()
1098 if (!dc) in txx9dmac_chan_probe()
1101 dc->dma.dev = &pdev->dev; in txx9dmac_chan_probe()
1102 dc->dma.device_alloc_chan_resources = txx9dmac_alloc_chan_resources; in txx9dmac_chan_probe()
1103 dc->dma.device_free_chan_resources = txx9dmac_free_chan_resources; in txx9dmac_chan_probe()
1104 dc->dma.device_terminate_all = txx9dmac_terminate_all; in txx9dmac_chan_probe()
1105 dc->dma.device_tx_status = txx9dmac_tx_status; in txx9dmac_chan_probe()
1106 dc->dma.device_issue_pending = txx9dmac_issue_pending; in txx9dmac_chan_probe()
1108 dc->dma.device_prep_dma_memcpy = txx9dmac_prep_dma_memcpy; in txx9dmac_chan_probe()
1109 dma_cap_set(DMA_MEMCPY, dc->dma.cap_mask); in txx9dmac_chan_probe()
1111 dc->dma.device_prep_slave_sg = txx9dmac_prep_slave_sg; in txx9dmac_chan_probe()
1112 dma_cap_set(DMA_SLAVE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1113 dma_cap_set(DMA_PRIVATE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1116 INIT_LIST_HEAD(&dc->dma.channels); in txx9dmac_chan_probe()
1117 dc->ddev = platform_get_drvdata(dmac_dev); in txx9dmac_chan_probe()
1118 if (dc->ddev->irq < 0) { in txx9dmac_chan_probe()
1122 tasklet_init(&dc->tasklet, txx9dmac_chan_tasklet, in txx9dmac_chan_probe()
1123 (unsigned long)dc); in txx9dmac_chan_probe()
1124 dc->irq = irq; in txx9dmac_chan_probe()
1125 err = devm_request_irq(&pdev->dev, dc->irq, in txx9dmac_chan_probe()
1126 txx9dmac_chan_interrupt, 0, dev_name(&pdev->dev), dc); in txx9dmac_chan_probe()
1130 dc->irq = -1; in txx9dmac_chan_probe()
1131 dc->ddev->chan[ch] = dc; in txx9dmac_chan_probe()
1132 dc->chan.device = &dc->dma; in txx9dmac_chan_probe()
1133 list_add_tail(&dc->chan.device_node, &dc->chan.device->channels); in txx9dmac_chan_probe()
1134 dma_cookie_init(&dc->chan); in txx9dmac_chan_probe()
1136 if (is_dmac64(dc)) in txx9dmac_chan_probe()
1137 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1139 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1140 spin_lock_init(&dc->lock); in txx9dmac_chan_probe()
1142 INIT_LIST_HEAD(&dc->active_list); in txx9dmac_chan_probe()
1143 INIT_LIST_HEAD(&dc->queue); in txx9dmac_chan_probe()
1144 INIT_LIST_HEAD(&dc->free_list); in txx9dmac_chan_probe()
1146 txx9dmac_reset_chan(dc); in txx9dmac_chan_probe()
1148 platform_set_drvdata(pdev, dc); in txx9dmac_chan_probe()
1150 err = dma_async_device_register(&dc->dma); in txx9dmac_chan_probe()
1154 dc->dma.dev_id, in txx9dmac_chan_probe()
1155 dma_has_cap(DMA_MEMCPY, dc->dma.cap_mask) ? " memcpy" : "", in txx9dmac_chan_probe()
1156 dma_has_cap(DMA_SLAVE, dc->dma.cap_mask) ? " slave" : ""); in txx9dmac_chan_probe()
1163 struct txx9dmac_chan *dc = platform_get_drvdata(pdev); in txx9dmac_chan_remove() local
1166 dma_async_device_unregister(&dc->dma); in txx9dmac_chan_remove()
1167 if (dc->irq >= 0) { in txx9dmac_chan_remove()
1168 devm_free_irq(&pdev->dev, dc->irq, dc); in txx9dmac_chan_remove()
1169 tasklet_kill(&dc->tasklet); in txx9dmac_chan_remove()
1171 dc->ddev->chan[pdev->id % TXX9_DMA_MAX_NR_CHANNELS] = NULL; in txx9dmac_chan_remove()