461 	struct d40_phy_res		*phy_chan;  member
619 	       chan->phy_chan->num * D40_DREG_PCDELTA;  in chan_base()
709 		int idx = d40c->phy_chan->num * D40_LCLA_LINK_PER_EVENT_GRP + i;  in d40_lcla_alloc_one()
737 		int idx = d40c->phy_chan->num * D40_LCLA_LINK_PER_EVENT_GRP + i;  in d40_lcla_free_all()
851 		if (!(chan->phy_chan->use_soft_lli &&  in d40_log_lli_to_lcxa()
882 		unsigned int lcla_offset = chan->phy_chan->num * 1024 +  in d40_log_lli_to_lcxa()
1050 	if (d40c->phy_chan->num % 2 == 0)  in __d40_execute_command_phy()
1057 			  D40_CHAN_POS_MASK(d40c->phy_chan->num)) >>  in __d40_execute_command_phy()
1058 			D40_CHAN_POS(d40c->phy_chan->num);  in __d40_execute_command_phy()
1064 	wmask = 0xffffffff & ~(D40_CHAN_POS_MASK(d40c->phy_chan->num));  in __d40_execute_command_phy()
1065 	writel(wmask | (command << D40_CHAN_POS(d40c->phy_chan->num)),  in __d40_execute_command_phy()
1072 				  D40_CHAN_POS_MASK(d40c->phy_chan->num)) >>  in __d40_execute_command_phy()
1073 				D40_CHAN_POS(d40c->phy_chan->num);  in __d40_execute_command_phy()
1090 				d40c->phy_chan->num, d40c->log_num,  in __d40_execute_command_phy()
1195 				"status %x\n", d40c->phy_chan->num,  in __d40_config_set_event()
1267 	if (d40c->phy_chan->num % 2 == 0)  in __d40_execute_command_log()
1273 	spin_lock_irqsave(&d40c->phy_chan->lock, flags);  in __d40_execute_command_log()
1280 				 D40_CHAN_POS_MASK(d40c->phy_chan->num)) >>  in __d40_execute_command_log()
1281 				 D40_CHAN_POS(d40c->phy_chan->num);  in __d40_execute_command_log()
1304 	spin_unlock_irqrestore(&d40c->phy_chan->lock, flags);  in __d40_execute_command_log()
1348 	addr_base = (d40c->phy_chan->num % 2) * 4;  in d40_config_write()
1351 		D40_CHAN_POS(d40c->phy_chan->num);  in d40_config_write()
1355 	var = d40_get_prmo(d40c) << D40_CHAN_POS(d40c->phy_chan->num);  in d40_config_write()
1360 		int lidx = (d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS)  in d40_config_write()
1413 	if (d40c->phy_chan == NULL) {  in d40_pause()
1438 	if (d40c->phy_chan == NULL) {  in d40_resume()
1887 		d40c->phy_chan = &phys[i];  in d40_allocate_channel()
1940 	d40c->phy_chan = &phys[i];  in d40_allocate_channel()
1947 		d40c->base->lookup_phy_chans[d40c->phy_chan->num] = d40c;  in d40_allocate_channel()
1988 	struct d40_phy_res *phy = d40c->phy_chan;  in d40_free_dma()
2035 	d40c->phy_chan = NULL;  in d40_free_dma()
2055 		if (d40c->phy_chan->num % 2 == 0)  in d40_is_paused()
2061 			  D40_CHAN_POS_MASK(d40c->phy_chan->num)) >>  in d40_is_paused()
2062 			D40_CHAN_POS(d40c->phy_chan->num);  in d40_is_paused()
2214 	if (!chan->phy_chan) {  in d40_prep_sg()
2428 		 d40c->phy_chan->num,  in d40_alloc_chan_resources()
2453 	if (d40c->phy_chan == NULL) {  in d40_free_chan_resources()
2537 	if (d40c->phy_chan == NULL) {  in d40_tx_status()
2557 	if (d40c->phy_chan == NULL) {  in d40_issue_pending()
2579 	if (d40c->phy_chan == NULL) {  in d40_terminate_all()
2648 	if (d40c->phy_chan == NULL) {  in d40_set_runtime_config()