166 	void __iomem		*chn_base;  member
209 	u32 orig = readl(schan->chn_base + reg);  in sprd_dma_chn_update()
213 	writel(tmp, schan->chn_base + reg);  in sprd_dma_chn_update()
305 			pause = readl(schan->chn_base + SPRD_DMA_CHN_PAUSE);  in sprd_dma_pause_resume()
323 	u32 cfg = readl(schan->chn_base + SPRD_DMA_CHN_CFG);  in sprd_dma_stop_and_disable()
336 	addr = readl(schan->chn_base + SPRD_DMA_CHN_DES_ADDR);  in sprd_dma_get_dst_addr()
337 	addr_high = readl(schan->chn_base + SPRD_DMA_CHN_WARP_TO) &  in sprd_dma_get_dst_addr()
346 	u32 intc_sts = readl(schan->chn_base + SPRD_DMA_CHN_INTC) &  in sprd_dma_get_int_type()
373 	u32 frag_reg = readl(schan->chn_base + SPRD_DMA_CHN_FRG_LEN);  in sprd_dma_get_req_type()
383 	writel(cfg->pause, schan->chn_base + SPRD_DMA_CHN_PAUSE);  in sprd_dma_set_chn_config()
384 	writel(cfg->cfg, schan->chn_base + SPRD_DMA_CHN_CFG);  in sprd_dma_set_chn_config()
385 	writel(cfg->intc, schan->chn_base + SPRD_DMA_CHN_INTC);  in sprd_dma_set_chn_config()
386 	writel(cfg->src_addr, schan->chn_base + SPRD_DMA_CHN_SRC_ADDR);  in sprd_dma_set_chn_config()
387 	writel(cfg->des_addr, schan->chn_base + SPRD_DMA_CHN_DES_ADDR);  in sprd_dma_set_chn_config()
388 	writel(cfg->frg_len, schan->chn_base + SPRD_DMA_CHN_FRG_LEN);  in sprd_dma_set_chn_config()
389 	writel(cfg->blk_len, schan->chn_base + SPRD_DMA_CHN_BLK_LEN);  in sprd_dma_set_chn_config()
390 	writel(cfg->trsc_len, schan->chn_base + SPRD_DMA_CHN_TRSC_LEN);  in sprd_dma_set_chn_config()
391 	writel(cfg->trsf_step, schan->chn_base + SPRD_DMA_CHN_TRSF_STEP);  in sprd_dma_set_chn_config()
392 	writel(cfg->wrap_ptr, schan->chn_base + SPRD_DMA_CHN_WARP_PTR);  in sprd_dma_set_chn_config()
393 	writel(cfg->wrap_to, schan->chn_base + SPRD_DMA_CHN_WARP_TO);  in sprd_dma_set_chn_config()
394 	writel(cfg->llist_ptr, schan->chn_base + SPRD_DMA_CHN_LLIST_PTR);  in sprd_dma_set_chn_config()
395 	writel(cfg->frg_step, schan->chn_base + SPRD_DMA_CHN_FRAG_STEP);  in sprd_dma_set_chn_config()
396 	writel(cfg->src_blk_step, schan->chn_base + SPRD_DMA_CHN_SRC_BLK_STEP);  in sprd_dma_set_chn_config()
397 	writel(cfg->des_blk_step, schan->chn_base + SPRD_DMA_CHN_DES_BLK_STEP);  in sprd_dma_set_chn_config()
398 	writel(cfg->req, schan->chn_base + SPRD_DMA_CHN_REQ);  in sprd_dma_set_chn_config()
927 		dma_chn->chn_base = sdev->glb_base + SPRD_DMA_CHN_REG_OFFSET +  in sprd_dma_probe()