914 	struct xor_regs *xor_reg;  in ppc440spe_adma_device_clear_eot_status()  local
996 		xor_reg = chan->device->xor_reg;  in ppc440spe_adma_device_clear_eot_status()
997 		rv = ioread32be(&xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
998 		iowrite32be(rv, &xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
1005 				u32 val = ioread32be(&xor_reg->ccbalr);  in ppc440spe_adma_device_clear_eot_status()
1007 				iowrite32be(val, &xor_reg->cblalr);  in ppc440spe_adma_device_clear_eot_status()
1009 				val = ioread32be(&xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
1011 					    &xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
1020 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&  in ppc440spe_adma_device_clear_eot_status()
1033 	struct xor_regs *xor_reg;  in ppc440spe_chan_is_busy()  local
1050 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_is_busy()
1051 		busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;  in ppc440spe_chan_is_busy()
1065 	struct xor_regs *xor_reg = chan->device->xor_reg;  in ppc440spe_chan_set_first_xor_descriptor()  local
1067 	if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)  in ppc440spe_chan_set_first_xor_descriptor()
1074 	iowrite32be(XOR_CRSR_64BA_BIT, &xor_reg->crsr);  in ppc440spe_chan_set_first_xor_descriptor()
1076 	iowrite32be(next_desc->phys, &xor_reg->cblalr);  in ppc440spe_chan_set_first_xor_descriptor()
1077 	iowrite32be(0, &xor_reg->cblahr);  in ppc440spe_chan_set_first_xor_descriptor()
1078 	iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,  in ppc440spe_chan_set_first_xor_descriptor()
1079 		    &xor_reg->cbcr);  in ppc440spe_chan_set_first_xor_descriptor()
1110 	struct xor_regs *xor_reg;  in ppc440spe_chan_append()  local
1150 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_append()
1159 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {  in ppc440spe_chan_append()
1169 			iowrite32be(ioread32be(&xor_reg->crsr) |  in ppc440spe_chan_append()
1171 				    &xor_reg->crsr);  in ppc440spe_chan_append()
1190 	struct xor_regs *xor_reg;  in ppc440spe_chan_get_current_descriptor()  local
1202 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_get_current_descriptor()
1203 		return ioread32be(&xor_reg->ccbalr);  in ppc440spe_chan_get_current_descriptor()
1213 	struct xor_regs *xor_reg;  in ppc440spe_chan_run()  local
1222 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_run()
1226 			    &xor_reg->crsr);  in ppc440spe_chan_run()
3944 			    &adev->xor_reg->ier);  in ppc440spe_adma_setup_irqs()
3993 		mask = ioread32be(&adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
3996 		iowrite32be(mask, &adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
4114 		adev->xor_reg = regs;  in ppc440spe_adma_probe()
4116 		iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr);  in ppc440spe_adma_probe()
4117 		iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr);  in ppc440spe_adma_probe()
4228 		iounmap(adev->xor_reg);  in ppc440spe_adma_probe()
4291 		iounmap(adev->xor_reg);  in ppc440spe_adma_remove()