942 				    DMA_CUED_XOR_BASE) {  in ppc440spe_adma_device_clear_eot_status()
1874 	xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;  in ppc440spe_rxor_set_src()
2138 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2164 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2220 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2248 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2273 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2830 	ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_zero_op()
2887 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_set_dest()
2893 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pq_set_dest()
2895 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pq_set_dest()
2930 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2934 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2963 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2973 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2977 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2994 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2999 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
3065 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3067 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pqzero_sum_set_dest()
3077 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3152 				haddr |= DMA_CUED_XOR_BASE;  in ppc440spe_adma_pq_set_src()